Specific Process Knowledge/Etch/RIE (Reactive Ion Etch): Difference between revisions

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==A rough overview of the performance of PECVD thin films and some process related parameters==
==A rough overview of the performance of the RIE´s and some process related parameters==


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Revision as of 10:14, 6 December 2007

Etching using the dry etch technique RIE (Reactive Ion Etch)

RIE1 (part of cluster1)
RIE2 (part of cluster2)

At Danchip we have three RIE's. Two (RIE1 and RIE2) for etching silicon based materials (silicon, silicon oxide, sillicon nitride) and one (III-V RIE) for etching III-V materials (is discussed under III-V processing). The hardware of RIE1 and RIE2 is very similar but you cannot count on that identical recipes on RIE1 and RIE2 perform exactly the same. In addition to that the main difference between RIE1 and RIE2 is the cleanness of the two equipment. In rough terms RIE1 is the clean system and the RIE2 is the dirty system. This means that in RIE2 opposed to RIE1 it is allowed have small amounts of metals exposed to the plasma. Look in the manuals for RIE1 and RIE2 to read the details for this difference (you can find the manuals in LabManager [1]).

Process information


A rough overview of the performance of the RIE´s and some process related parameters

Purpose Dry etch of
  • Silicon
  • Silicon oxide
  • Silicon (oxy)nitride
Performance Etch rates
  • Silicon: ~0.04-0.8 µm/min
  • Silicon oxide:~0.02-0.15 µm/min
  • Silicon (oxy)nitride:~0.02-? µm/min
. Anisotropy
  • Can vary from isotropic to anisotropic with vertical sidewalls and on to a physical etch were the sidewalls are angled but without etching under the mask.
. Process pressure
  • ~20-200 mTorr
. Gas flows
  • SF: 0-130 sccm
  • O: 0-100 sccm
  • CHF: 0-100 sccm
  • CF: 0-84 sccm
  • H: ?sccm
  • Ar: 0-145 sccm
  • N: 0-100 sccm
  • CF: 0-24 sccm
Substrates Batch size
  • 1 4" wafer per run
  • 1 2" wafer per run
  • Or several smaller pieces
. Substrate material allowed
  • Silicon wafers
    • with layers of silicon oxide or silicon (oxy)nitride
  • Quartz wafers
. Possible masking material
  • Photoresist/e-beam resist
  • Silicon/PolySi
  • Silicon oxide or silicon (oxy)nitride
  • Aluminium
  • Other metals if the coverage is <5% of the wafer area (ONLY PECVD3!)