Specific Process Knowledge/Thermal Process/C3 Anneal-bond furnace: Difference between revisions
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== | '''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Thermal_Process/C3_Anneal-bond_furnace click here]''' | ||
==Anneal-bond furnace (C3)== | |||
[[Image:C3.JPG|thumb|300x300px|C3 Anneal-bond furnace. Positioned in cleanroom 2]] | [[Image:C3.JPG|thumb|300x300px|C3 Anneal-bond furnace. Positioned in cleanroom 2]] | ||
The | The Anneal-bond furnace (C3) is a Tempress horizontal furnace for oxidation and annealing of (bonded) silicon wafers. | ||
This furnace is the third furnace tube in the furnace C-stack positioned in cleanroom 2. In this furnace it is allowed to enter wafers that come directly from bonding in the EVG NIL (assuming they were very clean when entering EVG NIL and not contain any metal). Check the [http://www.labmanager.danchip.dtu.dk/view_binary.php?fileId=1250 cross contamination chart]. | This furnace is the third furnace tube in the furnace C-stack positioned in cleanroom 2. In this furnace it is allowed to enter wafers that come directly from bonding in the EVG NIL (assuming they were very clean when entering EVG NIL and not contain any metal). Check the [http://www.labmanager.danchip.dtu.dk/view_binary.php?fileId=1250 cross contamination chart]. | ||
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'''The user manual, technical information and contact information can be found in LabManager:''' | '''The user manual, technical information and contact information can be found in LabManager:''' | ||
'''[http://www.labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=89 | '''[http://www.labmanager.danchip.dtu.dk/function.php?module=Machine&view=view&mach=89 Anneal-bond Furnace (C3)]''' | ||
==Process knowledge== | ==Process knowledge== |
Revision as of 14:36, 14 February 2013
Feedback to this page: click here
Anneal-bond furnace (C3)
The Anneal-bond furnace (C3) is a Tempress horizontal furnace for oxidation and annealing of (bonded) silicon wafers.
This furnace is the third furnace tube in the furnace C-stack positioned in cleanroom 2. In this furnace it is allowed to enter wafers that come directly from bonding in the EVG NIL (assuming they were very clean when entering EVG NIL and not contain any metal). Check the cross contamination chart.
The user manual, technical information and contact information can be found in LabManager:
Process knowledge
Purpose | Oxidation and annealing | Oxidation:
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Performance | Film thickness |
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Process parameter range | Process Temperature |
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Process pressure |
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Gas flows |
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Substrates | Batch size |
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Substrate material allowed |
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