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=This Part is under construction=
'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon click here]'''
<!-- Replace "http://labadviser.danchip.dtu.dk/..." with the link to the Labadviser page-->
== Comparing silicon etch methodes at Danchip [[Image:section under construction.jpg|70px]]==
There are a broad varity of silicon etch methodes at Danchip. The methodes are compared here to make it easier for you to compare and choose the one that suits your needs.
===Wet etches:===
*[[Specific Process Knowledge/Etch/KOH Etch|KOH Etch]]
*[[Specific Process Knowledge/Etch/Wet Polysilicon Etch|Wet PolySilicon etch]]
===Dry etches:===
*[[/Si etch using RIE1 or RIE2|Si etch using RIE1 or RIE2]]
*[[/Si etch using ASE|Si etch using ASE (Advanced Silicon Etch)]]
*[[Specific Process Knowledge/Etch/DRIE-Pegasus|Si etch using DRIE-Pegasus (Silicon Etch)]]
*[[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300/IBE Si etch|Si etch using IBE/IBSD Ionfab 300]]
==Compare the methodes for Si etching==
{|border="1" cellspacing="1" cellpadding="3" style="text-align:left;"
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![[Specific Process Knowledge/Etch/KOH Etch|KOH Etch]]
![[Specific Process Knowledge/Etch/Wet Polysilicon Etch|Wet PolySilicon etch]]
![[Specific Process Knowledge/Etch/RIE (Reactive Ion Etch)|RIE (Reactive Ion Etch)]]
![[Specific Process Knowledge/Etch/DRIE-Pegasus|DRIE-Pegasus (Silicon Etch)]]
![[Specific Process Knowledge/Etch/ASE (Advanced Silicon Etch)|ASE (Advanced Silicon Etch)]]
![[Specific Process Knowledge/Etch/ICP Metal Etcher|ICP Metal Etch]]
![[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
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!Generel description
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*Anisotropic etch in the (100)-plan
*High selectivity to the other plans
*Anisotropic etch: vertical sidewalls independent of the crystal plans
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*Isotropic etch in Silicon and Polysilicon
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*Can etch isotropic and anisotropic depending on the process parameters
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*State-of-the-art dry silicon etcher with atmospheric cassette loader
*Extremely high etch rate and advanced processing options
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*As RIE but better for high aspect ratio etching and deep etches (higher etch rate)
*Good selectivity to photoresist
*The ASE is dedicated to polymer etch, which can affect the Si etch stability.
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*This is dedicated to metal etch. So fare only Si etch of nanostructures has been explored on the system.
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*Primarily for pure physical etch by sputtering with Ar-ions
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|-style="background:LightGrey; color:black"
!Possible masking materials
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*Silicon Nitride
*Silicon Oxide
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*Photoresist
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*Photoresist
*E-beam resist
*Silicon Oxide
*Silicon Nitride
*Aluminium
*Chromium (ONLY RIE2!)
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
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*Photoresist and zep resist
*Silicon Oxide
*Silicon Nitride
*Aluminium oxide
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*Photoresist
*Silicon Oxide
*Silicon Nitride
*Aluminium
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*Photo-, DUV- and e-beamresist
*Silicon Oxide
*Silicon Nitride
*Aluminium
*Cr
*Ti
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*Any material that is accepted in the machine
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|-style="background:WhiteSmoke; color:black"
!Etch rate range
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*Si(100) @80<sup>o</sup>C: 1.29+0.05 µm/min
*Si(100) @70<sup>o</sup>C: ~0.7 µm/min
*Si(100) @60<sup>o</sup>C: ~0.4 µm/min
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*~100-200 nm/min, highly dependent on doping level
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*<40nm/min to >600nm/min depending on recipe parameters and mask design
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*Up to 18-20 µm/min depending on recipe, mask design and aspect ratio.
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*<130nm/min to >5.6 µm/min depending on recipe, mask design and aspect ratio.
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*Process dependant. The nano etch is in the range 59-311 nm/min
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*Process dependant. Has been tested in the range 17-31 nm/min
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!Substrate size
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*<nowiki>#</nowiki>25 wafers of 100mm in our 100mm bath
*<nowiki>#</nowiki>1-5 wafers of 100mm or 50mm in "Fumehood KOH"
*<nowiki>#</nowiki>25 wafers of 100mm or 150mm in our 6" bath
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*<nowiki>#</nowiki>25 100 mm wafers in our 100mm bath
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*As many small samples as can be fitted on the 100mm carrier.
*<nowiki>#</nowiki>1 100mm wafer (or smaller with carrier)
*<nowiki>#</nowiki>1 150mm wafer (only when the system is set up for 150mm)
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*As many small samples as can be fitted on a 100mm wafer
*<nowiki>#</nowiki>1 50 mm wafer fitted on a 100mm wafer
*<nowiki>#</nowiki>1 100 mm wafer
*<nowiki>#</nowiki>1 150 mm wafers (only when the system is set up to 150mm)
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*As many small samples as can be fitted on a 100mm wafer
*<nowiki>#</nowiki>1 50 mm wafer fitted on a 100mm wafer
*<nowiki>#</nowiki>1 100 mm wafer
*<nowiki>#</nowiki>1 150 mm wafers (only when the system is set up to 150mm)
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*As many small samples as can be fitted on a 150mm wafer
*<nowiki>#</nowiki>5 50 mm wafer fitted on a 150mm wafer
*<nowiki>#</nowiki>1 100 mm wafer on a 150mm wafer
*<nowiki>#</nowiki>1 150 mm wafers (The system is normally set up to 150mm)
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*As many samples as can be securely fitted on a up to 200mm wafer
*<nowiki>#</nowiki>1 50 mm wafer with special carrier
*<nowiki>#</nowiki>1 100 mm wafer with special carrier
*<nowiki>#</nowiki>1 150 mm wafers with special carrier
*<nowiki>#</nowiki>1 200 mm wafer
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|-style="background:WhiteSmoke; color:black"
!'''Allowed materials'''
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*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Other materials (only in "Fumehood KOH")
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*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
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*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*E-beam resist
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
*Quartz/fused silica
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*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*zep resist
*Aluminium oxide
*Quartz/fused silica
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*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*E-beam resist
*Aluminium
*Quartz/fused silica
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*Silicon
*Photoresist/e-beam resist
*PolySilicon
*Silicon oxide
*Silicon (oxy)nitride
*Aluminium
*Titanium
*Chromium
*Quartz/fused silica
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*Silicon
*Silicon oxides
*Silicon (oxy)nitrides
*Metals from the +list
*Metals from the -list
*Alloys from the above list
*Stainless steel
*Glass
*III-V materials
*Resists
*Polymers
*Capton tape
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