Jump to content

Specific Process Knowledge/Etch/Etching of Silicon: Difference between revisions

Jml (talk | contribs)
Jml (talk | contribs)
Line 9: Line 9:
*[[Specific Process Knowledge/Etch/DRIE-Pegasus|DRIE-Pegasus (Silicon Etch)]]
*[[Specific Process Knowledge/Etch/DRIE-Pegasus|DRIE-Pegasus (Silicon Etch)]]


==Comparison of KOH etch, wet PolySilicon etch, RIE etch and ASE etch for etching of Silicon==
==Comparison of KOH etch, wet PolySilicon etch, RIE etch, ASE etch and DRIE-Pegasus for etching of Silicon==
{| border="2" cellspacing="0" cellpadding="5" align="center"
{| border="2" cellspacing="0" cellpadding="5" align="center"
!  
!  
Line 16: Line 16:
! RIE
! RIE
! ASE
! ASE
! DRIE-Pegasus
|- valign="top"
|- valign="top"
|'''General description'''
|'''General description'''
Line 25: Line 26:
|
|
*Can etch isotropic and anisotropic depending on the process parameters
*Can etch isotropic and anisotropic depending on the process parameters
*Anisotropic etch: vertical sidewalls independent on the crystal plans
*Anisotropic etch: vertical sidewalls independent of the crystal plans
|
|
*As RIE but better for high aspect ratio etching and deep etches (higher etch rate)
*As RIE but better for high aspect ratio etching and deep etches (higher etch rate)
*Good selectivity to photoresist
*Good selectivity to photoresist
|
*State-of-the-art dry silicon etcher with atmospheric cassette loader
*Extremely high etch rate and advanced processing options
|-valign="top"
|-valign="top"
|'''Possible masking materials'''
|'''Possible masking materials'''
Line 49: Line 53:
*Silicon Nitride
*Silicon Nitride
*Aluminium
*Aluminium
|
*Photoresist and zep resist
*Silicon Oxide
*Silicon Nitride
*Aluminium oxide
|- valign="top"
|- valign="top"
|'''Etch rate'''
|'''Etch rate'''
Line 70: Line 79:
|
|
*4" (or smaller with carrier)
*4" (or smaller with carrier)
|
*6" (when it is set up for 6") and 4" (or smaller if you have a carrier)
|
|
*6" (when it is set up for 6") and 4" (or smaller if you have a carrier)  
*6" (when it is set up for 6") and 4" (or smaller if you have a carrier)  
Line 83: Line 94:
|
|
*One wafer at a time
*One wafer at a time
|
*One wafer at a time but you can set up a whole batch of 25 wafers
|-valign="top"
|-valign="top"
|'''Allowed materials'''
|'''Allowed materials'''
Line 115: Line 128:
*E-beam resist
*E-beam resist
*Aluminium
*Aluminium
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*zep resist
*Aluminium oxide
|-
|-
|}
|}