Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-3/SiO2 etch: Difference between revisions

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[[File:Peg3 SIO2 uniformity - Contour Plot 5.jpg|400px]]
[[File:Peg3 SIO2 uniformity - Contour Plot 5.jpg|400px]]

Revision as of 13:42, 25 January 2024

Etching of very thin layer of SiO2

Pegasus 3 is not meant to be used as an SiO2 etcher. Please do not develop nice SiO2 recipes on this machine. Often SIO2 etch recipes are very polymerizing and that can disturb the chamber conditions for the silicon etching recipes.

The recipe developed here is only for etching through a very thin SiO2 layer and does not have a high selectivity to silicon to avoid the recipe to become too polymerizing. It is also not very uniform over the wafer, so when it is used for etching down to silicon it will also etch a lot in the silicon and in areas more than other.

Test work done

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab

Tests with SiO2 etch
Wafer number C4F8 SF6 flow Ar Coil power Platen power Presure
Y34 Example Example Example Example Example Example
Y35 Example Example Example Example Example Example
Y36 Example Example Example Example Example Example
Y37 Example Example Example Example Example Example
Y38 Example Example Example Example Example Example
Y39 Example Example Example Example Example Example
Y40 Example Example Example Example Example Example

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