Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4/SiO2 Etch/Cr mask: Difference between revisions

From LabAdviser
Bghe (talk | contribs)
No edit summary
Bghe (talk | contribs)
No edit summary
Line 212: Line 212:


====Profile, top view at tilted SEM images====
====Profile, top view at tilted SEM images====
<gallery caption="SiO2 etch with Cr mask on full wafer 6 min etch" perrow="6" widths="200px" heights="150px">
File:C09721_center_10.jpg
File:C09721_center_18.jpg
File:C09721_center_21.jpg
File:C09721_center_07.jpg
File:C09721_center_05.jpg
File:C09721_center_22.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch" perrow="6" widths="200px" heights="150px">
File:C10022_03__06.jpg
File:C10022_03__04.jpg
File:C10022_03__02.jpg
File:C10022_03__08.jpg
File:C10022_03__10.jpg
File:C10022_03__12.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm" perrow="6" widths="200px" heights="150px">
File:C10025_03__11.jpg
File:C10025_03__09.jpg
File:C10025_03__07.jpg
File:C10025_03__05.jpg
File:C10025_03__03.jpg
File:C10025_03__01.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, O2:5sccm" perrow="6" widths="200px" heights="150px">
File:C10026_03__05.jpg
File:C10026_03__03.jpg
File:C10026_03__01.jpg
File:C10026_03__07.jpg
File:C10026_03__09.jpg
File:C10026_03__10.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:225sccm, Pressure:3.35mTorr" perrow="6" widths="200px" heights="150px">
File:C10082_11.jpg
File:C10082_09.jpg
File:C10082_07.jpg
File:C10082_05.jpg
File:C10082_03.jpg
File:C10082_01.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:225sccm, Pressure:3.35mTorr; platen power 150W, coil power:1200W" perrow="6" widths="200px" heights="150px">
File:C10084_15.jpg
File:C10084_13.jpg
File:C10084_11.jpg
File:C10084_09.jpg
File:C10084_06.jpg
File:C10084_03.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:215sccm O2:10sccm, Pressure:3.6mTorr; platen power 150W, coil power:1200W" perrow="6" widths="200px" heights="150px">
File:C10093_03__11.jpg
File:C10093_03__09.jpg
File:C10093_03__07.jpg
File:C10093_03__05.jpg
File:C10093_03__03.jpg
File:C10093_03__01.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1200W" perrow="7" widths="200px" heights="150px">
File:C10101_03__12.jpg
File:C10101_03__10.jpg
File:C10101_03__07.jpg
File:C10101_03__05.jpg
File:C10101_03__03.jpg
File:C10101_03__01.jpg
File:C10101_03__14.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:215sccm O2:10sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px">
File:C10102_03__05.jpg
File:C10102_03__03.jpg
File:C10102_03__01.jpg
File:C10102_03__20.jpg
File:C10102_03__18.jpg
File:C10102_03__16.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px">
File:C10110_04.jpg
File:C10110_06.jpg
File:C10110_08.jpg |pitch 800 nm <br> Top 461 nm <br> @edge 437 nm <br> bottom 402 nm <br> height 916 nm <br> height from edge 827 nm <br> Cr left 83.5 nm <br> selectivity 55.5
File:C10110_10.jpg |156 nm/min
File:C10110_12.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 6 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
File:C10119_01.jpg
File:C10119_03.jpg
File:C10119_05.jpg |pitch 800 nm <br> Top 444 nm <br> bottom 374 nm <br> height 718 nm <br> Cr left 85 nm <br> selectivity 48
File:C10119_06.jpg
File:C10119_09.jpg
File:C10119_11.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch (PLEASE DO NOT REPEAT THIS LONG TIME), H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
File:C10160_02.jpg
File:C10160_06.jpg
File:C10160_09.jpg
File:C10160_12.jpg
File:C10160_15.jpg
File:C10160_17.jpg
File:Contour Plot Y32 EM_02_30 blue to red.jpg| Etch on none patterned wafer, Uniformity: +- 6.4%
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 10 min etch, H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px">
File:C10161_01.jpg
File:C10161_03.jpg
File:C10161_05.jpg
File:C10161_07.jpg
File:C10161_09.jpg
File:C10161_11.jpg
</gallery>
<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.9mTorr; platen power 100W, coil power:1200W" perrow="7" widths="200px" heights="150px">
File:C10184_01.jpg
File:C10184_05.jpg
File:C10184_07.jpg
File:C10184_09.jpg
File:C10184_11.jpg
File:C10184_12.jpg
File:Contour Plot Y33 EM_0_0 blue to red.jpg| Etch on none patterned wafer, Uniformity: +-1.7%
</gallery>

Revision as of 11:13, 3 November 2023

Feedback to this page: click here
Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab

Start parameters, variations noted in the gallery headline Recipe name: no 10 with lower platen power
Coil Power [W] 2500
Platen Power [W] 200
Platen temperature [oC] 20
H2 flow [sccm] 25.6
C4F8 flow [sccm] 25.6
He flow [sccm] 448.7
Pressure Fully open APC valve (8-9 mTorr)
Electromagnetic coils (EM) 'outer coil' / 'inner coil' '2 A' / '30 A' (PLEASE DO NOT RUN WITH THESE SETTINGS FOR MORE THAN 6 MIN)
  • 100 nm Cr mask etched in ICP metal with 500nm DUV neg resist (NUV 2300-0.5) and 65 nm barc.

Results

Temporary conclusions on how the process parameters affect the results in this study: What process parameters affect the results?
  • Going from full wafer to small piece on Si carrier:
    • Seemed to give more sidewall passivation
  • Platen power: lowering the platen power gives
    • more sidewall passivation
    • lower etch rate
    • Less trenching
  • Removing the H2 gave:
    • less sidewall passivation
  • Adding O2 gave:
    • less sidewall passivation
  • Process pressure/total gasflow rate
    • Reducing total gasflow rate which reduced the pressur inside the chamber gave:
      • less sidewall passivation
      • Reduced the CD (Critical Dimensions)
  • Coil power: Reducing coil power
    • less CD loss
    • more sidewall passivation
  • Increasing process time:
    • less sidewall passivation
    • more sidewall bow
    • CD loss due to larger mask faceting
  • Sidewall passivation↑
    • Sample size↓
    • Platen power↓
    • Coil power↓
    • H2 flow↑
    • O2 flow↓
    • Total gas flow rate/pressure↑

Profile SEM images

Profile, top view at tilted SEM images