Specific Process Knowledge/Lithography/EBeamLithography/JEOLAlignment: Difference between revisions
Created page with "=Aligned exposure on JEOL 9500= There is quite a few things to remember in order to align an exposure to an existing pattern. The example below is a step by step guide illustrating global substrate alignment as well as chip alignment. ==Job preparation== ==Chip alignment== Chip alignment requires a global alignment to be made first to establish the wafer coordinate system. Hence a global alignment using '''GLMDET''' is used initially as in the example above. To further..." |
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Chip alignment requires a global alignment to be made first to establish the wafer coordinate system. Hence a global alignment using '''GLMDET''' is used initially as in the example above. To further illustrate chip alignment we will look at a particular layout shown below. The layout also illustrates a commonly used feature on the JEOL system to create arrays of arrays. In the layout below there is main 2x2 array and into each of these is a 5x5 subarray. Each element of the subarray is a single chip with four chip alignment marks. Notice that array placement is given in the substrate coordinate system and so is the global mark positions. Chip alignment marks (M1-M4) are however given in the local chip coordinate system. In the example files below we assume L1 is already defined on the substrate and we wish to align L2 to it. | Chip alignment requires a global alignment to be made first to establish the wafer coordinate system. Hence a global alignment using '''GLMDET''' is used initially as in the example above. To further illustrate chip alignment we will look at a particular layout shown below. The layout also illustrates a commonly used feature on the JEOL system to create arrays of arrays. In the layout below there is main 2x2 array and into each of these is a 5x5 subarray. Each element of the subarray is a single chip with four chip alignment marks. Notice that array placement is given in the substrate coordinate system and so is the global mark positions. Chip alignment marks (M1-M4) are however given in the local chip coordinate system. In the example files below we assume L1 is already defined on the substrate and we wish to align L2 to it. | ||