Specific Process Knowledge/Lithography/EBeamLithography/JEOLPatternPreparation: Difference between revisions
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There is two fundamentally different approaches to pattern alignment on the JEOL 9500 system. One can either do a wafer scale layout where essentially one design covering all elements of the pattern is exposed, i.e. a 1 by 1 array as defined by the ARRAY command. Or, one can expose chips instanced into an array using the ARRAY command. In the first case the pattern can only be aligned via global alignment to a single set of alignment marks defining the wafer coordinate system. In the second case, an initial wafer alignment is made but each chip can then be individually aligned to an extra set of individual chip alignment marks. The JEOL system supports 1 or 4 mark chip alignment (CHIPAL 1 or CHIPAL 4). This is illustrated below. | There is two fundamentally different approaches to pattern alignment on the JEOL 9500 system. One can either do a wafer scale layout where essentially one design covering all elements of the pattern is exposed, i.e. a 1 by 1 array as defined by the ARRAY command. Or, one can expose chips instanced into an array using the ARRAY command. In the first case the pattern can only be aligned via global alignment to a single set of alignment marks defining the wafer coordinate system. In the second case, an initial wafer alignment is made but each chip can then be individually aligned to an extra set of individual chip alignment marks. The JEOL system supports 1 or 4 mark chip alignment (CHIPAL 1 or CHIPAL 4). This is illustrated below. | ||
In the wafer scale layout, L1 | In the wafer scale layout, L1 is exposed with a set of global alignment marks (P & Q marks) in order to allow alignment of the next wafer scale layer, L2. Thus the placement of L2 is determined entirely by a single set of alignment marks. In the chip array design, in addition to the global alignment marks (P & Q marks) chip alignment marks for each instance of the chip design is also produced. Thus the placement of each instance of L2 is determined by a local mark very close to where the pattern of L2 is actually printed for increased alignment precision. | ||
Global alignment using P & Q marks is done using the SETWFR subprogram. The P & Q mark coordinates are defined in the substrate coordinate system (X,Y). For instance, on a 4" wafer it is typical to place the P and Q marks at (-40000,0) and (40000,0), respectively. | Global alignment using P & Q marks is done using the SETWFR subprogram. The P & Q mark coordinates are defined in the substrate coordinate system (X,Y). For instance, on a 4" wafer it is typical to place the P and Q marks at (-40000,0) and (40000,0), respectively. | ||