Specific Process Knowledge/Lithography/EBeamLithography/FirstEBL: Difference between revisions
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In the following we will look at each step in more detail and show step by step how to make a wafer/chip exposure. | In the following we will look at each step in more detail and show step by step how to make a wafer/chip exposure. | ||
==Resist coating== | ==Resist coating== | ||
DTU Nanolab offers a few different standard resist as given in the table below. Typically layers of 50-500 nm are applied. The Gamma UV & E-beam coater has predefined recipes for various thickness of CSAR resist. For other thickness or other resist the more manual Lab Spin 2 or 3 coasters can be used. If using the Lab Spin coaters please refer to the table below for information on thickness versus spin speed and soft bake conditions. | DTU Nanolab offers a few different standard resist as given in the table below. Typically layers of 50-500 nm are applied. The Gamma UV & E-beam coater has predefined recipes for various thickness of CSAR resist. For other thickness or other resist the more manual Lab Spin 2 or 3 coasters can be used. If using the Lab Spin coaters please refer to the table below for information on thickness versus spin speed and soft bake conditions. | ||