Specific Process Knowledge/Thermal Process/RTP Annealsys: Difference between revisions
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{| border="1" style="text-align: center" cellspacing="3" cellpadding="5" align="left" | {| border="1" style="text-align: center" cellspacing="3" cellpadding="5" align="left" | ||
|+ '''Argon rapid thermal annealing experiments and correspondent process parameters''' | |||
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!style="background:LightGray" | Sample ID | !style="background:LightGray" | Sample ID | ||
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'''Up''' = Facing the chamber; '''Up, covered''' = facing the chamber, covered with an identical (in size) Si chip during the process; | '''Up''' = Facing the chamber; '''Up, covered''' = facing the chamber, covered with an identical (in size) Si chip during the process; | ||
'''Flipped''' = Facing the carrier wafer; '''HF dip''' = 30s-HF chemical bath, immediately prior to processing. | |||
==== RTH ==== | ==== RTH ==== | ||