Specific Process Knowledge/Lithography/EBeamLithography/FirstEBL: Difference between revisions

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 ==General workflow==
-The general workflow of E-beam lithography on the JEOL 9500 system is summarized below. In order to optimize usage of the system steps 1 to x should all be done ahead of the booked session on the 9500 system.
+The general workflow of E-beam lithography on the JEOL 9500 system is summarized below. In order to optimize usage of the system steps 1 to 6 should all be done ahead of the booked session on the 9500 system.
-*Resist coating and baking
+#Resist coating and baking
-*Application of discharge layer on substrates with >100 nm non-conducting films
+#Application of discharge layer on substrates with >100 nm non-conducting films
-*Pattern preparation, possibly including Proximity Effect Correction
+#Pattern preparation, possibly including Proximity Effect Correction
-*Jobdeck file (JDF) and schedule file (SDF) preparation
+#Jobdeck file (JDF) and schedule file (SDF) preparation
-*Job file compilation
+#Job file compilation
-*Job file verification
+#Job file verification
-*Sample mounting
+#Sample mounting
-*Cassette transfer
+#Cassette transfer
-*System calibration
+#System calibration
-*Exposure
+#Exposure
-*Cassette and sample unloading
+#Cassette and sample unloading
-*Discharge layer removal
+#Discharge layer removal
-*Development
+#Development
 In the following we will look at each step in more detail and show step by step how to make a wafer/chip exposure.