Specific Process Knowledge/Etch/III-V ICP/SiO2: Difference between revisions

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Revision as of 11:19, 24 March 2023

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This page is written by Berit Herstrøm @ DTU Nanolab (BGHE) if nothing else is stated

Parameter Parameter settings
Coil Power [W] 200
Platen Power [W] 25
Platen temperature [oC] 20
CF4 flow [sccm] 20
H2 flow [sccm] 10
Pressure [mTorr] 3


Results SiO2 Etch Slow Test by Artem Shikin @ Fotonik
Etch rate of PECVD BPSG 39.4nm/min (22-01-2016)
Etch rate in thermal oxide

48nm/min (bghe 17-01-2017)- whole 4" wafer with capton tape
40-50 nm/min bghe (2019-2021 5 tests)

Selectivity to resist [:1] Not known
Etch rate in silicon

bghe@Nanolab 20190117

  • 35 nm/min (middle of the wafers with 80% load)
  • 36 nm/min (edge of the wafers with 80% load)
Wafer uniformity (100mm)
-0.4%-0.8% ((max-min)/2*Average) (bghe 2019-2021 5 tests)
Profile [o] Not known
Wafer uniformity map (click on the image to view a larger image) Not known
SEM profile images NONE
Comment Tested on a plane BPSG layer. The etch rate is much lower for an etch time of e.g. 5s