Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4/SiO2 Etch: Difference between revisions

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==SiO2 Etch==
==SiO2 Etch using resist as masking material==
I am in the process of doing some development of a SiO2 etch. So far I have found this fairly good recipe. For now it is the standard SiO2 etch recipes but I might change the "Standard recipe" a a later time if I find a better one. You are welcome to contact me see more result. I will add them to Labadviser at a later time.
I am in the process of doing some development of a SiO2 etch. So far I have found this fairly good recipe. For now it is the standard SiO2 etch recipes but I might change the "Standard recipe" a a later time if I find a better one. You are welcome to contact me see more result. I will add them to Labadviser at a later time.
/Berit Herstrøm bghe@dtu.dk (Nanolab)  
/Berit Herstrøm bghe@dtu.dk (Nanolab)  
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Image:C06445_02_15.jpg|1.0µ/0.25µ:<br> Etch depth: 893 nm<br> Resist left: 460 nm
Image:C06445_02_15.jpg|1.0µ/0.25µ:<br> Etch depth: 893 nm<br> Resist left: 460 nm
Image:C06445_02_13.jpg|4µ/1µ:<br> Etch depth: 1033 nm<br> Resist left: 473 nm
Image:C06445_02_13.jpg|4µ/1µ:<br> Etch depth: 1033 nm<br> Resist left: 473 nm
</gallery>
==SiO2 Etch using aSi as masking material==
I am now starting up development of SiO2 etch using aSi as masking material. <br>
The samples I use are:
*6" Si afters with oxide (2µm),
*aSi (~300nm),
*Neg. DUV reist (~60nm barc, ~350 nm resist)
*Reticle: Danchip/Triple-D
*Dose 230 J/m2
First I need to make sure that the resist work for pattering the aSi layer is good. If the resist is not good the final etch will also not be good.
==DUV optimisation==
Dose test with the doses (J/m2): 200, 210, 220, 230, 240, 250, 270, 280
The aim was to get good line for 400nm pitch/200nm lines
<gallery caption="400nm pitch 200 nm lines" perrow="5" widths="200px" heights="150px">
Image:dose200_no2_22.jpg |200 J/m2 400nm/268nm
Image:dose210_no2_15.jpg |210 J/m2 400nm/239nm
Image:dose220_no2_13.jpg |220 J/m2 400nm/208nm
Image:dose230_no2_11.jpg |230 J/m2 400nm/209nm
Image:dose240_no2_05.jpg |240 J/m2 400nm/215nm
Image:dose250_no2_11.jpg |250 J/m2 400nm/207nm
Image:dose260_no2_18.jpg |260 J/m2 400nm/188nm
Image:dose270_no2_24.jpg |270 J/m2 400nm/155nm
Image:dose280_no1_15.jpg |280 J/m2 400nm/0nm
</gallery>
<gallery caption="1000nm pitch 500 nm lines" perrow="3" widths="200px" heights="150px">
Image:dose210_no2_17.jpg |210 J/m2 1000nm/581nm
Image:dose230_no2_12.jpg |230 J/m2 1000nm/517nm
Image:dose240_no2_03.jpg |240 J/m2 1000nm/518nm
Image:dose250_no2_09.jpg |250 J/m2 1000nm/510nm
Image:dose260_no2_15.jpg |260 J/m2 1000nm/493nm
Image:dose270_no2_22.jpg |210 J/m2 1000nm/494nm


</gallery>
</gallery>

Revision as of 17:24, 23 April 2021

SiO2 Etch using resist as masking material

I am in the process of doing some development of a SiO2 etch. So far I have found this fairly good recipe. For now it is the standard SiO2 etch recipes but I might change the "Standard recipe" a a later time if I find a better one. You are welcome to contact me see more result. I will add them to Labadviser at a later time. /Berit Herstrøm bghe@dtu.dk (Nanolab)


SiO2 Etch using aSi as masking material

I am now starting up development of SiO2 etch using aSi as masking material.
The samples I use are:

  • 6" Si afters with oxide (2µm),
  • aSi (~300nm),
  • Neg. DUV reist (~60nm barc, ~350 nm resist)
  • Reticle: Danchip/Triple-D
  • Dose 230 J/m2

First I need to make sure that the resist work for pattering the aSi layer is good. If the resist is not good the final etch will also not be good.

DUV optimisation

Dose test with the doses (J/m2): 200, 210, 220, 230, 240, 250, 270, 280 The aim was to get good line for 400nm pitch/200nm lines