Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-2/Black silicon on Demand: Difference between revisions
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Example of the CORE recipe for BSi | Example of the CORE recipe for BSi | ||
[[File:Bsi.png|400px]] | [[File:Bsi.png|400px|center|thumb]] | ||
Silicon wafers are prepared with 1.5 μm thick resist patterns (AZ MIR 701 DUV resist from MicroChemicals) and exposed using a maskless aligner (MLA150, Heidelberg) to create patterns above 400 nm. Below are some SEM images of BSi nanostructures achieved by the modified CORE process: | Silicon wafers are prepared with 1.5 μm thick resist patterns (AZ MIR 701 DUV resist from MicroChemicals) and exposed using a maskless aligner (MLA150, Heidelberg) to create patterns above 400 nm. Below are some SEM images of BSi nanostructures achieved by the modified CORE process: | ||
[[File:BSi free.png|400px| | [[File:BSi free.png|400px|center|thumb|''''' 1 µm silicon pillars etched with a BSi-free recipe''''']] | ||
[[File:BSi full.png|400px| | [[File:BSi full.png|400px|center|thumb|''''' 1 µm silicon pillars etched first with a BSi-free recipe and then continued with a BSi-full recipe''''']] | ||
[[File:PR strip.png|800px|left|thumb|''''' By removing the mask on top of the pillars, the BSi can be formed on top of the these pillars''''']] | [[File:PR strip.png|800px|left|thumb|''''' By removing the mask on top of the pillars, the BSi can be formed on top of the these pillars''''']] | ||
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For more details, please contact Henri Jansen (henrija@dtu.dk) or Vy Thi Hoang Nguyen (vthongu@dtu.dk). | For more details, please contact Henri Jansen (henrija@dtu.dk) or Vy Thi Hoang Nguyen (vthongu@dtu.dk). | ||