Jump to content

Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-2/Si Nano etching: Difference between revisions

← Older editNewer edit →
VisualWikitext
Vthongu (talk | contribs)
DCH-Employees-701, NLAB-Employees-701, NLAB-LabmanagerAllUsers, NLAB-Nlab347-labadviser-users-35231
188 edits
No edit summary
Vthongu (talk | contribs)
DCH-Employees-701, NLAB-Employees-701, NLAB-LabmanagerAllUsers, NLAB-Nlab347-labadviser-users-35231
188 edits
No edit summary
Line 15: Line 15:


'''Rule 3''': The undercut is roughly half of the gained etch depth per CORE cycle.
'''Rule 3''': The undercut is roughly half of the gained etch depth per CORE cycle.
Silicon wafers are prepared with 1.5 μm thick resist patterns (AZ MIR 701 DUV resist from MicroChemicals) and exposed using a maskless aligner (MLA150, Heidelberg) to create patterns above 400 nm.
For nanosized patterns between 30 and 100 nm, an electron beam writing system (JEOL JBX-9500FSZ)  is used with positive tone e-beam resist ZEP520A (ZEON).


Below are some SEM images of the silicon nanostructures achieved by the CORE process:
Below are some SEM images of the silicon nanostructures achieved by the CORE process:
Line 31: Line 35:




Silicon wafers are prepared with 1.5 μm thick resist patterns (AZ MIR 701 DUV resist from MicroChemicals) and exposed using a maskless aligner (MLA150, Heidelberg) to create patterns above 400 nm.
For nanosized patterns between 30 and 100 nm, an electron beam writing system (JEOL JBX-9500FSZ)  is used with positive tone e-beam resist ZEP520A (ZEON).


For more details, please contact Henri Jansen (henrija@dtu.dk) or Vy Thi Hoang Nguyen (vthongu@dtu.dk).
For more details, please contact Henri Jansen (henrija@dtu.dk) or Vy Thi Hoang Nguyen (vthongu@dtu.dk).
Retrieved from "https://labadviser.nanolab.dtu.dk//index.php?title=Specific_Process_Knowledge/Etch/DRIE-Pegasus/Pegasus-2/Si_Nano_etching"