Specific Process Knowledge/Etch/III-V ICP/InP-InGaAsP-InGaAs: Difference between revisions

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=== InP etch with Cl2/CH4/Ar 2013===
=== InP etch with Cl2/CH4/Ar 2013===

Revision as of 14:31, 21 October 2019

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InP etch with HBr chemistry

Work done by Aurimas Sakanas @Fotonik.dtu 2019

Recipe ?
HBr flow 10 sccm
CH4 flow 5 sccm
Ar flow 2 sccm
Platen power 50 W
Coil power 600 W
Pressure 5 mTorr
Platen chiller temperature 180 oC
Comment Sample crystal bonded (Crystalbond 509, clear color) to Si carrier


Results
Etch rate

250-350 nm/min (2" wafer)
350-450 nm/min (quarter of a 2" wafer)

Sidewall angle

85-87 o (bottom)
93-95 o (top)
Concave profile

Selectivity (InP:HSQ) 15:1 (2"), 20:1

InP etch with Cl2/CH4/Ar 2013

Work done by Matthew Haines in 2013

InP/InGaAsP/InGaAs etch 2011

Unselective etch for large sized features and small aspect ratios by David Larsson, DTU Photonics, 2011

Recipe InP Etch 1/InP Precond 1
Cl2 flow 20 sccm
N2 flow 40 sccm
Ar flow 10 sccm
Platen power 100 W
Coil power 500 W
Pressure 2 mTorr
Platen chiller temperature 180 oC
Comment Use SiO2 carrier (not Si) (Kabi/Bghe June 2018)


Results (InP Etch 1)
Etch rate 500-600 nm/min
Sidewall angle 86-87 o
Selectivity (InP:SiO2, InP:HSQ) 50:1

InP etching June 2018

Done by Kabi and Bghe @danchip

Sample pattern before etching

Etching of an InP piece on Si carrier

InP piece patterned with SiO2. The piece was etched on top of a Si wafer without bonding. The recipe "InP etch" was used. The roughness looks high in the bottom of the etched areas, especially in the large open areas.

Etching of an InP piece on SiO2 carrier

InP piece patterned with SiO2. The piece was etched on top of a Si wafer coated with SiO2 without bonding. The recipe "InP etch" was used. The roughness looks low in the bottom of the etched areas, even in the large open areas.


Changing the Cl2/N2 ratio