Specific Process Knowledge/Etch/ASE (Advanced Silicon Etch)

The ASE

The ICP-DRIE tool at Danchip: STS ASE - positioned in cleanroom2

The ICP-DRIE (Inductively Coupled Plasma - Deep Reactive Ion Etcher) tool at Danchip is manufactured by STS and is called the ASE (Advanced Silicon Etcher). The main purpose of the ASE is etching of silicon using Bosch process.

The Bosch process: Etching of silicon

The Bosch process uses alternation between an etch cycle and a passivation cycle. Introducing a passivation step in an etch process is very beneficial for the control of the angle of the sidewalls in the etch process because it allows us to cover them with a protective layer that suppresses the isotropic etching. Combined with the high plasma density in the ICP chamber, the excellent sidewall control enables us to etch high aspect ratio structures in silicon with very high etch rates.

In the case of the silicon etching on the ASE, an etch phase with SF₆ and O₂ alternates with a passivation phase with C₄F₈.

Process information

• Etch of Silicon using ASE

An overview of the performance of the ASE and some process related parameters

Purpose	Dry etch of	Silicon
Performance	Etch rates	Silicon: ~4-6 µm/min (depending on features size and etch load)
	Anisotropy	Good
Process parameter range	Process pressure	~0.1-95 mTorr
	Gas flows	SF$_{6}$: 0-600 sccm O$_{2}$: 0-100 sccm C$_{4}$F$_{8}$: 0-300 sccm Ar: 0-100 sccm
Substrates	Batch size	1 6" wafer per run 1 4" wafer per run 1 2" wafer per run Or several smaller pieces on a carrier wafer
	Substrate material allowed	Silicon wafers with layers of silicon oxide or silicon (oxy)nitride Quartz wafers
	Possible masking material	Photoresist/e-beam resist PolySilicon Silicon oxide or silicon (oxy)nitride Aluminium