Specific Process Knowledge/Bonding: Difference between revisions

From LabAdviser
Rkch (talk | contribs)
No edit summary
Rkch (talk | contribs)
Line 13: Line 13:
*[[/Anodic bonding|Anodic bonding]]
*[[/Anodic bonding|Anodic bonding]]


== Comparing the three bonding methods in the EVG NIL (EVG NIL has been <span style ="color: red"> Decommissioned </span>) ==
== Comparing the three bonding methods in the wafer bonder 2 ==


{| border="2" cellspacing="0" cellpadding="2"  
{| border="2" cellspacing="0" cellpadding="2"  
Line 54: Line 54:
|-style="background:WhiteSmoke; color:black"
|-style="background:WhiteSmoke; color:black"
!Substrate size
!Substrate size
|Up to 6" (aligning only possible for 4" and 6")
|Up to 6"
|Up to 6" (aligning only possible for 4" and 6")
|Up to 6"
|Up to 6" (aligning only possible for 4" and 6") 
|Up to 6"  
|-
|-


Line 67: Line 67:


|-style="background:WhiteSmoke; color:black"
|-style="background:WhiteSmoke; color:black"
!IR alignment
!Backside alignment
|Double side polished wafers.
|Double side polished wafers.
|Double side polished wafers.
|Double side polished wafers.

Revision as of 14:39, 18 May 2017

Feedback to this page: click here


Choose equipment

Choose bonding methods in EVG NIL

Comparing the three bonding methods in the wafer bonder 2


Eutectic bonding Fusion bonding Anodic bonding
General description For bonding two substrates by use of an interphase that makes an eutecticum. For bonding two identical materials. For bonding Si and Glass.
Bonding temperature Depending on the eutecticum 310°C to 400°C. Depending on defects 50°C to 400°C. Depending on the voltage 300°C to 500°C Standard is 400°C.
Annealing temperature No annealing 1000°C-1100°C in the anneal bond furnace (C3). No annealing
Materials possible to bond Bonding of substrates is done by use of the eutectica Au/Si, Au/Sn and Au/Sn/Ni Si/Si, SiO2/SiO2 Si/Pyrex (glass)
Substrate size Up to 6" Up to 6" Up to 6"
Cleaning Cleaning by N2. Wet chemical cleaning, IMEC. Cleaning by N2.
Backside alignment Double side polished wafers. Double side polished wafers. Not relevant.