Specific Process Knowledge/Etch/DRIE-Pegasus/processA/PrA-0: Difference between revisions
Created page with " {| border="2" cellpadding="0" cellspacing="0" style="text-align:center;" |+ '''Process runs''' |- ! rowspan="2" width="40"| Date ! colspan="2" width="120"| Substrate Informa..." |
No edit summary |
||
Line 10: | Line 10: | ||
|- | |- | ||
! width="30" | Wafer info | ! width="30" | Wafer info | ||
! width="40" | | ! width="40" | Exposed area | ||
! width="40" | Conditioning | ! width="40" | Conditioning | ||
! width="40" | Recipe | ! width="40" | Recipe | ||
! width="40" | Wafer ID | ! width="40" | Wafer ID | ||
|- | |- | ||
| | | 2/5-2016 | ||
| 4" | | 4" Travka20 Wafer | ||
| | | 20 % Si | ||
| 3 minute TDESC clean | |||
| | | PrA-0, 80 cycles or 14:40 minutes | ||
| C03991.01 | |||
| | |||
| | |||
| | | | ||
[[file: | |||
[[file: | [[file:C03991.01 074.jpg|150px|frameless ]] | ||
[[file: | [[file:C03991.01 075.jpg|150px|frameless ]] | ||
[[file: | [[file:C03991.01 076.jpg|150px|frameless ]] | ||
[[file: | [[file:C03991.01 077.jpg|150px|frameless ]] | ||
[[file: | [[file:C03991.01 078.jpg|150px|frameless ]] | ||
[[file: | [[file:C03991.01 079.jpg|150px|frameless ]] | ||
[[file:C03991.01 080.jpg|150px|frameless ]] | |||
[[file:C03991.01 081.jpg|150px|frameless ]] | |||
[[file:C03991.01 101.jpg|150px|frameless ]] | |||
[[file:C03991.01 064.jpg|150px|frameless ]] | |||
[[file:C03991.01 065.jpg|150px|frameless ]] | |||
[[file:C03991.01 066.jpg|150px|frameless ]] | |||
[[file:C03991.01 067.jpg|150px|frameless ]] | |||
[[file:C03991.01 068.jpg|150px|frameless ]] | |||
[[file:C03991.01 069.jpg|150px|frameless ]] | |||
[[file:C03991.01 070.jpg|150px|frameless ]] | |||
[[file:C03991.01 071.jpg|150px|frameless ]] | |||
[[file:C03991.01 072.jpg|150px|frameless ]] | |||
[[file:C03991.01 073.jpg|150px|frameless ]] | |||
|- | |- | ||
|} | |} |