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{| border="2" cellspacing="0" cellpadding="10" width="60%"
{| border="2" cellspacing="0" cellpadding="10" width="60%"
!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment  
!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment  
!style="background:silver; color:black;" align="left"|Purpose
|style="background:silver; color:black;" align="left"|JEOL JBX-9500FSZ
|style="background:LightGrey; color:black"|pattern an electron sensitive resist
|style="background:silver; color:black;" align="left"|Raith Elphy
|style="background:WhiteSmoke; color:black"|Mainly for pattering structures with minimum feature size between 12 nm - 1 µm
|-
|-
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Performance
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Performance
|style="background:LightGrey; color:black"|Resolution
|style="background:LightGrey; color:black"|Resolution
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|~5 nm beam diameter, ~10 nm lines obtained in 50 nm thick resist (CSAR)
* ~5 nm beam diameter, ~10 nm lines obtained in 50 nm thick resist (CSAR)
|
|-


|-
|style="background:LightGrey; color:black"|Maximum writing area without stitching
|style="background:LightGrey; color:black"|Maximum writing area without stitching
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|1mm x 1mm
*1mm x 1mm
|
|-
|-
!style="background:silver; color:black" align="left" valign="top" rowspan="6"|Process parameter range
!style="background:silver; color:black" align="left" valign="top" rowspan="6"|Process parameter range
|style="background:LightGrey; color:black"|E-beam voltage
|style="background:LightGrey; color:black"|E-beam voltage
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|100 kV
*100kV
|style="background:WhiteSmoke; color:black"|5-25 kV
|-
|-
|style="background:LightGrey; color:black"|Scanning speed
|style="background:LightGrey; color:black"|Scanning speed
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|100 MHz
*100MHz
|style="background:WhiteSmoke; color:black"|? MHz
|-
|-
|style="background:LightGrey; color:black"|Min. electron beam size
|style="background:LightGrey; color:black"|Min. electron beam size
|style="background:WhiteSmoke; color:black"|4 nm
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*5nm
|-
|-
|style="background:LightGrey; color:black"|Min. step size
|style="background:LightGrey; color:black"|Min. step size
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|1 nm
*1nm
|style="background:WhiteSmoke; color:black"|1 nm
|-
|-
|style="background:LightGrey; color:black"|Beam current range
|style="background:LightGrey; color:black"|Beam current range
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|0.1nA to 60nA in normal conditions
*0.1nA to 60nA in normal conditions (see available condition files <span class="plainlinks">[http://labmanager.danchip.dtu.dk/function.php?module=Machine&view=log&mach=292&type=status here]</span>)
|style="background:WhiteSmoke; color:black"|X-Y nA
|-
|-
|style="background:LightGrey; color:black"|Dose range
|style="background:LightGrey; color:black"|Dose range
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"| 0.001 - 100000µC/cm<sup>2</sup>
*0.001µC/cm<sup>2</sup> to 100000µC/cm<sup>2</sup>
|style="background:WhiteSmoke; color:black"| µC/cm<sup>2</sup>
|-
|-
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Samples
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Samples
|style="background:LightGrey; color:black"|Batch size
|style="background:LightGrey; color:black"|Batch size
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*1 x 6" wafer
*1 x 6" wafer
*Special wafer cassette with slit openings of 20 mm (position A), 12 mm (position B), 8 mm (position C) and 4 mm (position D).
*Special wafer cassette with slit openings of 20 mm (position A), 12 mm (position B), 8 mm (position C) and 4 mm (position D).
|style="background:WhiteSmoke; color:black"|
|-
|-
| style="background:LightGrey; color:black"|Substrate material allowed
 
|style="background:LightGrey; color:black"|Substrate material allowed
|style="background:WhiteSmoke; color:black"|
*Silicon, quartz, pyrex, III-V materials
*Wafers with layers of silicon oxide or silicon (oxy)nitride
*Wafers with layers of metal
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Silicon, quartz, pyrex, III-V materials
*Silicon, quartz, pyrex, III-V materials
*Wafers with layers of silicon oxide or silicon (oxy)nitride
*Wafers with layers of silicon oxide or silicon (oxy)nitride
*Wafers with layers of metal
*Wafers with layers of metal
|}
|}


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