Specific Process Knowledge/Etch/ICP Metal Etcher/Chromium: Difference between revisions

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The Chromium etch was carried out on the following substrate stack:
The Chromium etch was carried out on the following substrate stack:
2" Si wafer with Cr laying in a 6" Si wafer with a 4" recess. The area outside the recess was covered by AZ resist.
2" Si wafer with Cr laying in a 6" Si wafer with a 4" recess. The area outside the recess was covered by AZ resist.
The work was carried out be Erol Zekovic @Nanotech and BGHE@danchip
The work was carried out be Erol Zekovic @Nanotech and BGHE@nanolab
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Revision as of 14:44, 25 January 2019

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Chromium etch in ICP metal - small substrate using carrier

The Chromium etch was carried out on the following substrate stack: 2" Si wafer with Cr laying in a 6" Si wafer with a 4" recess. The area outside the recess was covered by AZ resist. The work was carried out be Erol Zekovic @Nanotech and BGHE@nanolab

Cr etch
Parameter Cr etch
Cl2 (sccm) 65
O2 (sccm) 15
Pressure (mTorr) 15
Coil power (W) 300
Platen power (W) 15
Temperature (oC) 50
Spacers (mm) 100
Etch rate (nm/min) ~32 (Date: 2014-08-13)
Zep520A resist selectivity NA
Comment Was masked by capton tape


Chromium etch in ICP metal on a thick glass substrate

The Chromium etch has ONLY been carried out on the following substrate stack: The Chromium is sputter deposited onto a 2" quartz wafer and pattered by e-beam with Zep520A resist. This 2" QZ wafer is bonded with crystal bond to a 65mmx65mm quartz plate with the thickness: 6.35mm. This QZ plate is bonded to a Si wafer.

Cr etch by bghe@danchip
Parameter Cr etch
Cl2 (sccm) 65
O2 (sccm) 15
Pressure (mTorr) 15
Coil power (W) 300
Platen power (W) 15
Temperature (oC) 50 (no back side cooling)
Spacers (mm) 100
Etch rate (nm/min) ~14
Zep520A resist selectivity ~0.9
Comment .