Specific Process Knowledge/Thermal Process/C3 Anneal-bond furnace: Difference between revisions

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 ==Overview of the performance of Anneal Bond furnace and some process related parameters==
-{| border="2" cellspacing="0" cellpadding="0"
+{| border="2" cellspacing="0" cellpadding="2"
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 !style="background:silver; color:black;" align="center"|Purpose
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 !style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range
-|style="background:LightGrey; color:black"|Process Temperature
+|style="background:LightGrey; color:black"|Process temperature
 |style="background:WhiteSmoke; color:black"|
 *800-1150 <sup>o</sup>C
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 |style="background:LightGrey; color:black"|Batch size
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-*1-30 4" wafer (or 2" wafers) per run
+*1-30 100 mm wafers (or 50 mm wafers) per run
 |-
-|style="background:LightGrey; color:black"|Substrate material allowed
+|style="background:LightGrey; color:black"|Substrate materials allowed
 |style="background:WhiteSmoke; color:black"|
-*Silicon wafers (new from the box or RCA cleaned)
+*Silicon wafers (new wafers or RCA cleaned wafers)
 *Silicon wafers with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
-*Quartz wafers (RCA cleaned)
+*Wafers from the LPCVD furnaces
-*From bonding in EVG NIL directly (assuming they were clean and not contain any metal when entering EVG NIL)
+*Wafers from EVG NIL(assuming they were clean and not have been exposed to any metal when entering EVG NIL)
 |-
 |}