Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF): Difference between revisions

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 {| border="2" cellspacing="0" cellpadding="2"
-!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment
+!colspan="2" border="none" style="background:silver; color:black;" align="center"|Etchant
-|style="background:WhiteSmoke; color:black"|<b>KOH3</b>
+|style="background:WhiteSmoke; color:black"|<b>BHF</b>
-|style="background:WhiteSmoke; color:black"|<b>KOH2</b>
+|style="background:WhiteSmoke; color:black"|<b>5% HF</b>
-|style="background:WhiteSmoke; color:black"|<b>KOH1</b>
+|style="background:WhiteSmoke; color:black"|<b>40% HF</b>
-|style="background:WhiteSmoke; color:black"|<b>KOH Fumehood</b>
+|style="background:WhiteSmoke; color:black"|<b>SiO etch</b>
 |-
 !style="background:silver; color:black;" align="center" width="60" rowspan="2"|Purpose
-|style="background:LightGrey; color:black"|Wet etch of Silicon
+|style="background:LightGrey; color:black"|Etching of silicon oxide
 |style="background:WhiteSmoke; color:black"|
-*Etch of Silicon in 28 wt% KOH
+*Etching of silicon oxide with a stable etch rate
 |style="background:WhiteSmoke; color:black"|
-*Etch of Silicon in 28 wt% KOH
+*Mainly for removing native oxide
 |style="background:WhiteSmoke; color:black"|
-*Etch of Silicon in 28 wt% KOH saturated with IPA
+*Mainly for etching deep into borofloat or quartz wafers
 |style="background:WhiteSmoke; color:black"|
-*Etch of Silicon in user mixed KOH
+*Etching of silicon oxide - especially for etching small holes
 |-
 |style="background:LightGrey; color:black"|Link to safety APV and KBA
 |style="background:WhiteSmoke; color:black"|
-*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=1906&mach=248 see APV here]
+*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=1897&mach=64 see APV here]
-*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see KBA here]
+*:[http://kemibrug.dk/KBA/CAS/106534/?show_KBA=1&portaldesign=1 see KBA here]
 |style="background:WhiteSmoke; color:black"|
-*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=1906&mach=49 see APV here]
+*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=1897&mach=64 see APV here]
-*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see KBA here]
+*:[http://kemibrug.dk/KBA/CAS/106534/?show_KBA=1&portaldesign=1 see KBA here]
 |style="background:WhiteSmoke; color:black"|
-*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=1906&mach=49 see APV here]
+*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=2479&mach=146 see APV here]
-*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see KBA here]
+*:[http://kemibrug.dk/KBA/CAS/100648/?lang=da&show_KBA=1&portaldesign=1 see KBA here]
 |style="background:WhiteSmoke; color:black"|
-*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=2479&mach=197 see APV here]
+*:[http://www.labmanager.danchip.dtu.dk/d4Show.php?id=1897&mach=64 see APV here]
-*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see KBA here]
+*:[http://kemibrug.dk/KBA/CAS/106534/?show_KBA=1&portaldesign=1 see KBA here]
 |-
-!style="background:silver; color:black" align="center" valign="center" rowspan="4"|Performance
+!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range
-|style="background:LightGrey; color:black"|Etch rates in crystalline silicon (100)
+|style="background:LightGrey; color:black"|Chemical solution
 |style="background:WhiteSmoke; color:black"|
-*0.4 µm/min (60 °C)
+*28 wt% mixed in the ratio
-*0.7 µm/min (70 °C)
+KOH:H<sub>2</sub>O - 500 g : 1000 ml
-*1.3 µm/min (80 °C)
 |style="background:WhiteSmoke; color:black"|
-*0.4 µm/min (60 °C)
+*28 wt% mixed in the ratio
-*0.7 µm/min (70 °C)
+KOH:H<sub>2</sub>O - 500 g : 1000 ml
-*1.3 µm/min (80 °C)
 |style="background:WhiteSmoke; color:black"|
-*0.7 µm/min (70 °C)
+*28 wt% mixed in the ratio
-*0.2 µm/min (70 °C) for Boron doped Si (doping level > 5x10<sup>19</sup> cm<sup>-3</sup>)
+KOH:H<sub>2</sub>O:IPA - 500 g : 1000 ml : ?? ml
 |style="background:WhiteSmoke; color:black"|
-*Somewhat lower than in the dedicated baths. Approximately 1 µm/min @ 80 °C in 28 wt%
+*Custom made
-|-
-|style="background:LightGrey; color:black"|Etch rates in Thermal SiO2
-|style="background:WhiteSmoke; color:black"|
-*Theoretical values:
-*1.2 nm/min (60 °C)
-*6 nm/min (80 °C)
-|style="background:WhiteSmoke; color:black"|
-*Theoretical values:
-*1.2 nm/min (60 °C)
-*6 nm/min (80 °C)
-|style="background:WhiteSmoke; color:black"|
-|style="background:WhiteSmoke; color:black"|
-|-
-|style="background:LightGrey; color:black"|Roughness
-|style="background:WhiteSmoke; color:black"|
-*Typical: 100-600 Å
-|style="background:WhiteSmoke; color:black"|
-*Typical: 100-600 Å
-|style="background:WhiteSmoke; color:black"|
-*May form hillocks (pyramidal)
-|style="background:WhiteSmoke; color:black"|
-*Typical worse than KOH2 and KOH3
-|-
-|style="background:LightGrey; color:black"|Anisotropy
-|style="background:WhiteSmoke; color:black"|
-*The etch rate is very dependent on the crystal orientation of the silicon.
-|style="background:WhiteSmoke; color:black"|
-*The etch rate is very dependent on the crystal orientation of the silicon.
-|style="background:WhiteSmoke; color:black"|
-*With IPA some crystal planes etches at a slower rate than for KOH without IPA.
-|style="background:WhiteSmoke; color:black"|
-*The etch rate is very dependent on the crystal orientation of the silicon.
 |-
-!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Process parameter range
 |style="background:LightGrey; color:black"|Temperature
 |style="background:WhiteSmoke; color:black"|
@@ Line 272: / Line 237: @@
 *Max 80 °C
 |-
-|style="background:LightGrey; color:black"|Chemical solution
+|style="background:LightGrey; color:black"|Etchrates in thermal SiO<sub>2</sub>
 |style="background:WhiteSmoke; color:black"|
 *28 wt% mixed in the ratio
@@ Line 285: / Line 250: @@
 *Custom made
 |-
-!style="background:silver; color:black" align="center" valign="center" rowspan="4"|Substrates
+!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates
-|style="background:LightGrey; color:black"|Batch size
-|style="background:WhiteSmoke; color:black"|
-*1-25 wafers at a time
-|style="background:WhiteSmoke; color:black"|
-*1-25 wafers at a time
-|style="background:WhiteSmoke; color:black"|
-*1-25 wafers at a time
-|style="background:WhiteSmoke; color:black"|
-*1-7 wafers at a time
-|-
-|style="background:LightGrey; color:black"|Size of substrate
-|style="background:WhiteSmoke; color:black"|
-*4” wafers
-*6” wafers
-|style="background:WhiteSmoke; color:black"|
-*4” wafers
-|style="background:WhiteSmoke; color:black"|
-*4” wafers
-|style="background:WhiteSmoke; color:black"|
-*2” wafers
-*4” wafers
-*Small pieces
-|-
-|style="background:LightGrey; color:black"|Allowed materials
-|style="background:WhiteSmoke; color:black"|
-*Silicon
-*Silicon oxide
-*Silicon (oxy)nitride
-|style="background:WhiteSmoke; color:black"|
-*Silicon
-*Silicon oxide
-*Silicon (oxy)nitride
-|style="background:WhiteSmoke; color:black"|
-*Silicon
-*Silicon oxide
-*Silicon (oxy)nitride
-|style="background:WhiteSmoke; color:black"|
-*All except for Polymers
-|-
 |style="background:LightGrey; color:black"|Masking material
 |style="background:WhiteSmoke; color:black"|
@@ Line 346: / Line 272: @@
 *PECVD Si3N4
 *Thermal SiO2
+|-
+|-
+|style="background:LightGrey; color:black"|Lifetime of photoresist
+|style="background:WhiteSmoke; color:black"|
+*4” wafers
+*6” wafers
+|style="background:WhiteSmoke; color:black"|
+*4” wafers
+|style="background:WhiteSmoke; color:black"|
+*4” wafers
+|style="background:WhiteSmoke; color:black"|
+*2” wafers
+*4” wafers
+*Small pieces
 |-
 |}
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