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Specific Process Knowledge/Lithography/Coaters: Difference between revisions

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===Process information===
===Process information===
[[Specific Process Knowledge/Lithography/Coaters/Spin Track 1 + 2 processing|Spin Track 1 + 2 processing]]
[[Specific Process Knowledge/Lithography/Coaters/Spin Track 1 + 2 processing|Spin Track 1 + 2 processing]]
'''HMDS priming:'''
The process of HMDS priming on Spin Track 1 + 2 consists of five steps:
*Contact bake
*Vacuum bake
*Priming
*Pump-purge
*Cooling
The wafer is first baked in contact with the hotplate in order to heat the wafer to the hotplate temperature. The hotplates of the priming modules are set to 50°C. Then the wafer is baked under a low vacuum (~0.5 bar) in order to dehydrate the wafer before HMDS application. The HMDS is applied to the wafer using nitrogen as a carrier gas. 15 liters per minute of dry nitrogen is bubbled through liquid HMDS before flowing across the wafer surface. After the priming, the chamber is pump-purged twice, using a 7s pump to ~0.5 bar and a 10s nitrogen purge at 40 liters per minute. Finally, the wafer is cooled on the priming module coolplate.
The contact angle after HMDS priming is a function of the priming temperature, the priming time, and the surface condition of the wafer. Tests have shown the contact angle to decrease with increasing hotplate temperature, while it increases as a function of priming time at constant temperature. At a priming temperature of 50°C, the contact angle resulting from priming an oxidized silicon wafer for t = 30 - 300s may be approximated by
<math>\theta = 95 - 119.2 * t^{-0.51}</math>
The condition of the substrate surface is again a function of the substrate type, the substrate history, and the vacuum baking temperature and time. Since the vapor pressure of water at 50°C (0.123 bar) is lower than the vacuum bake pressure of 0.5 bar, the degree of dehydration will be a function of the vacuum baking time. Thus, for thick oxides, the standard of 30s vacuum bake may not be enough to dehydrate the surface sufficiently.
'''Spin coating:'''
Dispence. Spin-of. EBR. BSR.
'''Soft baking:'''
Contact or proximity. Bake. Cool.
'''Post-exposure baking:'''
Contact or proximity. Bake. Cool.
====HMDS priming only====
The standard HMDS priming process has been developed to mimic the behavior of the IMTEC Star2000 HMDS oven.
It produces a contact angle of 81-82° on an oxidized silicon surface.
''Flow names, process parameters, and test results:''
*T1 T2 HMDS Standard
Process: 10s contact bake, 30s vacuum bake, 72s HMDS priming, 5s cooling.
Tested 7/5 2013 on 110nm oxide: 81.4°. Tested 12/6 2013 on 3µm oxide: 81.8°. Tested 20/6 on 15µm oxide (dehydrated 1 hour at 250°C): 68-70°. Tested 21/6 on 15µm oxide (dehydrated 18 hours at 250°C): 71°.
====AZ MiR 701 (29cps) coating====
Spin coating of AZ MiR 701 (29cps) on Spin Track 1 is divided into two or three steps: HMDS priming (optional), spin coating, and soft baking. At the moment, the HMDS priming is equal to the standard priming, but this may be subject to change as our process knowledge grows. Spin coating uses dynamic dispence of 4 ml resist at 800 rpm, followed by spin-of at a thickness dependent spin speed for a thickness dependent time. The wafer is deaccelerated at 1000 rpm/s for 5 seconds before stopping. Soft baking is done at 90°C for 60s. As MiR 701 has a tendency to produce "cotton candy" on the edges, soft baking is performed in 1 mm proximity.
''Flow names, process parameters, and test results:''
*T1 MiR 701 1um no HMDS
*T1 MiR 701 1um with HMDS
Spin-of: 60 s at 9990 rpm.
Tested ?? (with HMDS) on fresh silicon: ? µm.
*T1 MiR 701 1,5um no HMDS
*T1 MiR 701 1,5um with HMDS
Spin-of: 30 s at 5000 rpm.
Tested 18/6 2013 (with HMDS) on fresh silicon: 1.5? µm.
*T1 MiR 701 2um no HMDS
*T1 MiR 701 2um with HMDS
Spin-of: 30 s at 2600 rpm.
Tested ?? (with HMDS) on fresh silicon: ? µm.
====AZ nLOF 2020 coating====
*T2 nLOF 2020 2um no HMDS
*T2 nLOF 2020 2um with HMDS
*T2 nLOF 2020 3um no HMDS
*T2 nLOF 2020 3um with HMDS
*T2 nLOF 2020 4um no HMDS
*T2 nLOF 2020 4um with HMDS
*T2 nLOF 2020 5um no HMDS
*T2 nLOF 2020 5um with HMDS
====Post-exposure baking====
*T2 5214E image reversal bake
*T2 MiR 701 PEB
*T2 nLOF 2020 PEB
Link to process pages - e.g. one page for each material
Example:
*[[Specific Process Knowledge/Etch/Etching of Silicon/Si etch using RIE1 or RIE2|Etch of silicon using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using RIE1 or RIE2|Etch of silicon oxide using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Nitride/Etch of Silicon Nitride using RIE|Etch of silicon nitride using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Polymer/Etch of Photo Resist using RIE|Etch of photo resist using RIE]]


=== Equipment performance and process related parameters ===
=== Equipment performance and process related parameters ===