Specific Process Knowledge/Lithography/EBeamLithography/FilePreparation/Pathlist: Difference between revisions
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=Path list= | |||
This is the full path list as available on the JEOL 9500 system. Please contact the EBL staff if you need a custom path defined on the tool. <div class="left" style="color:red; width:auto; margin-left:auto; margin-right:auto;">'''Users are NOT allowed to change the path definition file on the system.'''</div> | |||
INITIAL signifies subprograms carried out prior to pattern writing. CYCLIC determines subprograms carried out at the set interval during pattern writing. The first cycle is carried out right after INITIAL and hence before pattern writing. CYCLE defines the time between cyclic calibration, unit is minutes. The is two different behaviours toggled with the field '''F''' switch. Without the '''F''' switch cyclic calibration is only performed after pattern writing of the current chip is completed. If the pattern is a full wafer, i.e. defined as a (1,1) array in the JDF, no cyclic calibration will be done during pattern writing. With the '''F''' switch cyclic calibration will start at the end of the current writing field after the designated interval has passed. | |||
<pre> | |||
;;*** Mask Exposure Peformance Test *** | ;;*** Mask Exposure Peformance Test *** | ||
MASK00: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,DISTBE,PDEFBE,SUBDEFBE | MASK00: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,DISTBE,PDEFBE,SUBDEFBE | ||
Line 228: | Line 236: | ||
DRF5M: INITIAL CURRNT,HEIMAP | DRF5M: INITIAL CURRNT,HEIMAP | ||
CYCLIC CURRNT,DRIFT | |||
CYCLE 5M,F | |||
DTU5M: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,SUBDEFBE | DTU5M: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,SUBDEFBE | ||
Line 238: | Line 246: | ||
CYCLIC CURRNT | CYCLIC CURRNT | ||
CYCLE 30M | CYCLE 30M | ||
</pre> |
Latest revision as of 16:48, 16 April 2023
Path list
This is the full path list as available on the JEOL 9500 system. Please contact the EBL staff if you need a custom path defined on the tool.
INITIAL signifies subprograms carried out prior to pattern writing. CYCLIC determines subprograms carried out at the set interval during pattern writing. The first cycle is carried out right after INITIAL and hence before pattern writing. CYCLE defines the time between cyclic calibration, unit is minutes. The is two different behaviours toggled with the field F switch. Without the F switch cyclic calibration is only performed after pattern writing of the current chip is completed. If the pattern is a full wafer, i.e. defined as a (1,1) array in the JDF, no cyclic calibration will be done during pattern writing. With the F switch cyclic calibration will start at the end of the current writing field after the designated interval has passed.
;;*** Mask Exposure Peformance Test *** MASK00: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,DISTBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M MASK01: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M ;;*** Direct Exposure Peformance Test *** DIRE00: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,PDEFBE,SUBDEFBE CYCLIC CURRNT CYCLE 5M DIRE01: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT CYCLE 5M ;;*** Minimum Line Exposure Peformance Test *** MINI01: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M ;;*** Test Exposure *** TEST00: INITIAL HEIMAP TEST01: INITIAL CURRNT TEST02: INITIAL HEIMAP,CURRNT TEST03: INITIAL CURRNT,INITBE TEST04: INITIAL HEIMAP,CURRNT,INITBE TEST05: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE TEST06: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,SUBDEFBE TEST07: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,SUBDEFBE TEST08: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,DISTBE,SUBDEFBE TEST09: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 1 TEST10: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 1 TEST11: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M, F TEST12: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,DISTBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M, F TEST13: INITIAL INITAE,INITBE,CURRNT,PDEFBE CYCLIC DRIFT CYCLE 1M, F TEST14: INITIAL CURRNT CYCLIC DRIFT CYCLE 99 DRIFT0: INITIAL INITAE, INITBE CYCLIC INITAE, INITBE, DRIFT, CURRNT CYCLE 1 DRIFT1: INITIAL INITAE, INITBE CYCLIC INITAE, INITBE, DRIFT, CURRNT CYCLE 1M,F LONG01: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M LONG02: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT,INITBE,PDEFBE,SUBDEFBE CYCLE 5M MINI02: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,INITBE CYCLE 20M HEIGH1: INITIAL HEIMAP,CURRNT CYCLIC CURRNT,DRIFT CYCLE 10M MASK02: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC DRIFT,CURRNT CYCLE 4 MASK03: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M MASK04: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M MASK05: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,DISTBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M MASK06: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC INITBE,PDEFBE,SUBDEFBE,CURRNT,DRIFT CYCLE 5M AUTO00: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,PDEFBE,SUBDEFBE DIRE02: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE DIRE03: INITIAL CURRNT,INITBE CYCLIC CURRNT,DRIFT CYCLE 20M DIRE04: INITIAL CURRNT,INITBE,PDEFBE CYCLIC CURRNT CYCLE 20M DIRE05: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT CYCLE 20M DIRE06: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,SUBDEFBE CYCLIC CURRNT CYCLE 20M DIRE07: INITIAL CURRNT,INITBE,PDEFBE,DISTBE,PDEFBE,SUBDEFBE CYCLIC CURRNT CYCLE 20M DRFT01: INITIAL CURRNT CYCLIC DRIFT CYCLE 1 SBG01: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,SUBDEFBE SBG02: INITIAL HEIMAP SBG03: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M SBG04: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M SBG05: INITIAL CURRNT CYCLIC CURRNT,DRIFT CYCLE 5M SBG06: INITIAL HEIMAP CYCLIC CURRNT,DRIFT CYCLE 5M SBG07: INITIAL CURRNT CYCLIC CURRNT,DRIFT CYCLE 34 TOK01: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 20M G5MHA: INITIAL HEIMAP CYCLIC CURRNT,DRIFT CYCLE 5M G5MHB: INITIAL HEIMAP CYCLIC DRIFT CYCLE 5M G5MA: INITIAL CURRNT CYCLIC CURRNT,DRIFT CYCLE 5M G5MB: INITIAL CURRNT CYCLIC DRIFT CYCLE 5M G34HA: INITIAL HEIMAP CYCLIC CURRNT,DRIFT CYCLE 34 G34HB: INITIAL HEIMAP CYCLIC DRIFT CYCLE 34 G34A: INITIAL CURRNT CYCLIC CURRNT,DRIFT CYCLE 34 G34B: INITIAL CURRNT CYCLIC DRIFT CYCLE 34 G1HA: INITIAL HEIMAP CYCLIC CURRNT,DRIFT CYCLE 1 G1HB: INITIAL HEIMAP CYCLIC DRIFT CYCLE 1 G1A: INITIAL CURRNT CYCLIC CURRNT,DRIFT CYCLE 1 G1B: INITIAL CURRNT CYCLIC DRIFT CYCLE 1 HEICU: INITIAL HEIMAP,CURRNT HCD: INITIAL HEIMAP CYCLIC CURRNT,DRIFT CYCLE 30M CD: INITIAL CURRNT CYCLIC DRIFT CYCLE 30M FT01: INITIAL CURRNT CYCLIC CURRNT,DRIFT CYCLE 5M,F LONG03: INITIAL CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT,INITBE,PDEFBE,SUBDEFBE CYCLE 5M,F HEI: INITIAL HEIMAP CYCLIC CURRNT CYCLE 10M DRF5M: INITIAL CURRNT,HEIMAP CYCLIC CURRNT,DRIFT CYCLE 5M,F DTU5M: INITIAL HEIMAP,CURRNT,INITBE,PDEFBE,SUBDEFBE CYCLIC CURRNT,DRIFT CYCLE 5M,F CUR: INITIAL CURRNT CYCLIC CURRNT CYCLE 30M