Specific Process Knowledge/Etch/III-V RIE: Difference between revisions

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==III-V RIE Plassys==
==III-V RIE Plassys==


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The diameter of the quartz plate is 20 cm, ie up to 2 4" wafers, 3 3" wafers or 4 2" wafers can be processed simultaneously. The area, A, of the quartz plate is 314 cm<sup>2</sup>.
The diameter of the quartz plate is 20 cm with a recess for 4" wafers, ie up to one 4" wafer, one 3" wafer or one 2" wafer or several smaller samples can be processed simultaneously. To strike a plasma, the applied power should be 50 W or more; if a process needs a lower power during etch it is necessary to initially strike the plasma with eg 50 W (higher powers are needed for lower gas pressures) for 5-10 sec where after the power can be lowered to the desired value.
 
The intensity of the plasma is the ratio of power applied to the plasma, P, to the area, A, of the quartz plate. A power of 1000 W thus gives a plasma intensity of 0.32 W/cm<sup>2</sup>. To strike a plasma, the applied power should be 50 W or more; if a process needs a lower power during etch it is necessary to initially strike the plasma with eg 50 W (higher powers are needed for lower gas pressures) for 5-10 sec where after the power can be lowered to the desired value.


The chamber should be cleaned after '''all''' usage of the machine; read more under [[/III_V_RIE_ETCHES#Chamber Cleaning|Chamber Cleaning]].
The chamber should be cleaned after '''all''' usage of the machine; read more under [[/III_V_RIE_ETCHES#Chamber Cleaning|Chamber Cleaning]].
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*20 cm
*20 cm
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|-
| style="background:LightGrey; color:black"|Substrate material allowed
| style="background:LightGrey; color:black"|Material allowed
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
* III-V compound semiconductors
* III-V compound semiconductors
|-
* Silicon based materials
| style="background:LightGrey; color:black"|Possible masking material
* Photoresist/e-beam resist
|style="background:WhiteSmoke; color:black"|
* BCB
*Photoresist/e-beam resist
* For other materials, please ask
*Titanium
|-  
|-  
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Latest revision as of 16:10, 22 March 2023

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Unless otherwise stated, this page is written by DTU Nanolab internal

III-V RIE Plassys

Name: MG300 RIE
Vendor: Plassys

General information

III-V RIE is located in room A-1

Dry etching of III-V compound semiconductors is performed with a conventional Reactive Ion Etch (RIE) located in cleanroom A-1. The III-V RIE is a Plassys model MG300. Find the company website her: Plassys.

The system is equipped with a laser interferometer to monitor etch-rate and -depth.

The user manuals, user APVs, technical information and contact information can be found in LabManager:

III-V RIE (Plassys)


The diameter of the quartz plate is 20 cm with a recess for 4" wafers, ie up to one 4" wafer, one 3" wafer or one 2" wafer or several smaller samples can be processed simultaneously. To strike a plasma, the applied power should be 50 W or more; if a process needs a lower power during etch it is necessary to initially strike the plasma with eg 50 W (higher powers are needed for lower gas pressures) for 5-10 sec where after the power can be lowered to the desired value.

The chamber should be cleaned after all usage of the machine; read more under Chamber Cleaning.

Process information

Overview of the performance of the RIE´s and some process-related parameters

Purpose Dry etch of
  • SiO2
  • Si3N4
  • BCB
  • Resist
  • InP
  • InGaAs
Performance (see specific recipes) Etch rates
  • SiO2: ~1-30 nm/min
  • Si3N4: ~17-38 nm/min
  • BCB: ~70-880 nm/min (needs testing)
  • Resist: ~30-98 nm/min (AZ5206 and ZEP520A), ~70-815 nm/min (AZ5214)
  • InP: ~29 nm/min
  • GaAs: ~9 nm/min
Anisotropy
  • Can vary from isotropic to anisotropic with vertical sidewalls and on to a physical etch were the sidewalls are angled but without etching under the mask.
Process parameters Plasma pressure
  • down to 10 mTorr
Maximum Gas flows
  • O2: 50 sccm
  • CHF3: 17.5 sccm
  • CH4: 10 sccm
  • H2: 50 sccm
  • Ar: 20 sccm
Substrates diameter of quartz plate
  • 20 cm
Material allowed
  • III-V compound semiconductors
  • Silicon based materials
  • Photoresist/e-beam resist
  • BCB
  • For other materials, please ask