Specific Process Knowledge/Thermal Process/A2 Gate Oxide furnace: Difference between revisions
(4 intermediate revisions by 2 users not shown) | |||
Line 2: | Line 2: | ||
'''Feedback to this page''': '''[mailto:thinfilm@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Thermal_Process/A2_Gate_Oxide_furnace click here]''' | '''Feedback to this page''': '''[mailto:thinfilm@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Thermal_Process/A2_Gate_Oxide_furnace click here]''' | ||
''This page is written by DTU Nanolab internal'' | |||
[[Category: Equipment |Thermal A2]] | [[Category: Equipment |Thermal A2]] | ||
[[Category: Thermal process|Furnace]] | [[Category: Thermal process|Furnace]] | ||
[[Category: Furnaces|A2]] | [[Category: Furnaces|A2]] | ||
==Gate Oxide furnace (A2)== | ==Gate Oxide furnace (A2)== | ||
[[Image:borpredep.jpg|thumb|300x300px|Gate Oxide furnace (A2). Positioned in cleanroom B-1]] | [[Image:borpredep.jpg|thumb|300x300px|Gate Oxide furnace (A2). Positioned in cleanroom B-1/ Photo: DTU Nanolab internal]] | ||
The Gate Oxide furnace (A2) is a Tempress horizontal furnace for oxidation of very clean silicon wafers. For instance gate oxide layers can be grown in the furnace. A gate oxide is very thin thermal oxide located over the gate or active region of individual resistors in a MOSFET (metal-oxide field effect semiconductor transistor). | The Gate Oxide furnace (A2) is a Tempress horizontal furnace for oxidation of very clean silicon wafers. For instance gate oxide layers can be grown in the furnace. A gate oxide is very thin thermal oxide located over the gate or active region of individual resistors in a MOSFET (metal-oxide field effect semiconductor transistor). | ||
Line 32: | Line 31: | ||
!style="background:silver; color:black;" align="center"|Purpose | !style="background:silver; color:black;" align="center"|Purpose | ||
|style="background:LightGrey; color:black"| | |style="background:LightGrey; color:black"| | ||
*Oxidation of silicon ( | *Oxidation of silicon wafers (e.g. gate oxide layers) | ||
|style="background:WhiteSmoke; color:black"|Oxidation: | |style="background:WhiteSmoke; color:black"|Oxidation: | ||
*Dry | *Dry oxidation using O<sub>2</sub> | ||
|- | |- | ||
!style="background:silver; color:black" align="center"|Performance | !style="background:silver; color:black" align="center"|Performance | ||
|style="background:LightGrey; color:black"|Film thickness | |style="background:LightGrey; color:black"|Film thickness | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*Dry SiO<sub>2</sub>: | *Dry SiO<sub>2</sub>: ~ 0 nm to 300 nm (it takes too long to grow thicker dry oxide layers) | ||
|- | |- | ||
!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range | !style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range | ||
Line 48: | Line 47: | ||
|style="background:LightGrey; color:black"|Process pressure | |style="background:LightGrey; color:black"|Process pressure | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*1 atm | *1 atm (no vacuum) | ||
|- | |- | ||
|style="background:LightGrey; color:black"|Gasses on the system | |style="background:LightGrey; color:black"|Gasses on the system | ||
Line 58: | Line 57: | ||
|style="background:LightGrey; color:black"|Batch size | |style="background:LightGrey; color:black"|Batch size | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*1-30 100 mm wafers (or 50 mm wafers) | *1-30 100 mm wafers (or 50 mm wafers) | ||
|- | |- | ||
| style="background:LightGrey; color:black"|Substrate materials allowed | | style="background:LightGrey; color:black"|Substrate materials allowed |
Latest revision as of 10:27, 31 January 2023
Feedback to this page: click here
This page is written by DTU Nanolab internal
Gate Oxide furnace (A2)
The Gate Oxide furnace (A2) is a Tempress horizontal furnace for oxidation of very clean silicon wafers. For instance gate oxide layers can be grown in the furnace. A gate oxide is very thin thermal oxide located over the gate or active region of individual resistors in a MOSFET (metal-oxide field effect semiconductor transistor).
Only dry oxidation can be done in the furnace. The oxidation recipes on the furnace are named e.g. "DRY1000", where "DRY" indicates that it is a dry oxidation process, and the number indicates the oxidation temperature.
This furnace is the second furnace tube in the furnace A-stack positioned in cleanroom B-1. The Gate Oxide furnace is the cleanest of all furnaces in the cleanroom, i.e. wafers will metal bulk contanination (e.g. wafers that have exposed to plasma) are not allowed in the furnace. Please be aware of that all wafers have to be RCA cleaned before they enter the furnace, and check the cross contamination information in LabManager before you use the furnace.
The user manual, technical information and contact information can be found in LabManager:
Process knowledge
Purpose |
|
Oxidation:
|
---|---|---|
Performance | Film thickness |
|
Process parameter range | Process Temperature |
|
Process pressure |
| |
Gasses on the system |
| |
Substrates | Batch size |
|
Substrate materials allowed |
|