Specific Process Knowledge/Etch/Etching of Silicon/Si etch using ASE: Difference between revisions
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==The Bosch process: Etching of silicon== | ==The Bosch process: Etching of silicon== | ||
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== Process development == | == Process development == | ||
===Etch of nano sized structures=== | ===Etch of nano sized structures=== | ||
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*See pxnano2 and comparison with nanotech on the Pegasus: [[Specific Process Knowledge/Etch/DRIE-Pegasus/nanoetch/nano142-pxnano2]] | *See pxnano2 and comparison with nanotech on the Pegasus: [[Specific Process Knowledge/Etch/DRIE-Pegasus/nanoetch/nano142-pxnano2]] | ||
Older work: | Older work: | ||
Three different examples of etch are shown here. The masking material was zep520A (80 nm). | Three different examples of etch are shown here. The masking material was zep520A (80 nm). | ||
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==Etching Si without back side cooling== | |||
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Etching in an ICP as the ASE without backside cooling normally results in heating up the sample to more than 100 degrees Celsius. This can be problematic especially when using resist as a masking material. <br> | Etching in an ICP as the ASE without backside cooling normally results in heating up the sample to more than 100 degrees Celsius. This can be problematic especially when using resist as a masking material. <br> | ||