Specific Process Knowledge/Etch/KOH Etch: Difference between revisions
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'''Feedback to this page''': '''[mailto:labadviser@ | '''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/KOH_Etch click here]''' | ||
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==KOH etch - ''Anisotropic silicon etch''== | [[index.php?title=Category:Equipment|Etch Wet KOH etch]] | ||
[[index.php?title=Category:Etch (Wet) bath|KOH etch]] | |||
==Si etch - ''Anisotropic silicon etch''== | |||
KOH belongs to the family of anisotropic Si-etchants based on aqueous alkaline solutions. The anisotropy stems from the different etch rates in different crystal directions. The {111}-planes are almost inert whereas the etch rates of e.g. {100}- and {110}-planes are several orders of magnitude faster. | KOH belongs to the family of anisotropic Si-etchants based on aqueous alkaline solutions. The anisotropy stems from the different etch rates in different crystal directions. The {111}-planes are almost inert whereas the etch rates of e.g. {100}- and {110}-planes are several orders of magnitude faster. | ||
KOH-etching is a highly versatile and cheap way to realize micro mechanical structures if you can live with the necessary Si<sub>3</sub>N<sub>4</sub>- or SiO<sub>2</sub>-masking materials and the potassium contamination of the surface. '''The latter necessitates in most cases a wet post-clean ([[Specific Process Knowledge/Wafer cleaning/7-up & Piranha|'7-up']] or [[Specific Process Knowledge/Wafer cleaning/RCA|RCA-clean]]) if the wafer is to be processed further.''' | KOH-etching is a highly versatile and cheap way to realize micro mechanical structures if you can live with the necessary Si<sub>3</sub>N<sub>4</sub>- or SiO<sub>2</sub>-masking materials and the potassium contamination of the surface. '''The latter necessitates in most cases a wet post-clean ([[Specific Process Knowledge/Wafer cleaning/7-up & Piranha|'7-up']] or [[Specific Process Knowledge/Wafer cleaning/RCA|RCA-clean]]) if the wafer is to be processed further. we also recommend to rinse the wafers in a 5% HCL solution to remove metal ions from the KOH solution.''' | ||
At | At DTU Nanolab we use as a standard a 28 wt% KOH. The etch rate - and the selectivity towards a SiO<sub>2</sub>-mask - is depending on the temperature. We normally use T=80 <sup>o</sup>C but may choose to reduce this to e.g. 60 <sup>o</sup>C or 70 <sup>o</sup>C in case of a high-precision timed etch (e.g. defining a thin membrane). In some cases we recommend to saturate the standard 28 wt% KOH with IPA with an etch temperature at T=70 <sup>o</sup>C (reduce evaporation of IPA). One example is for boron etch-stop, where the selectivity towards the boron-doped silicon is improved compared to the standard etch. Etching with IPA added to the KOH solution (250ml IPA/1000ml KOH) can be done in KOH fumehood. | ||
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[http://labmanager.dtu.dk/function.php?module=Machine&view=view&mach=376 Si Etch 1: KOH info page in LabManager], | |||
[http://labmanager | |||
[http://labmanager.dtu.dk/function.php?module=Machine&view=view&mach=390 Si Etch 2: KOH info page in LabManager], | |||
[http://labmanager | [http://labmanager.dtu.dk/function.php?module=Machine&view=view&mach=407 Si Etch 3: KOH info page in LabManager] | ||
==Process Information== | ==Process Information== | ||
*[[/ProcessInfo#QC|QC info for standard KOH baths]] | |||
*[[/ProcessInfo#Mixing KOH|How to mix KOH]] | |||
*[[/ProcessInfo#Backside protection|Backside protection]] | |||
*[[/ProcessInfo#Theory|Crystal orientation dependency]] | |||
==KOH etching baths== | ==KOH etching baths== | ||
Key facts for the different etch baths available at | Key facts for the different etch baths available at DTU Nanolab are resumed in the table: | ||
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!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment | !colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment | ||
|style="background:WhiteSmoke; color:black"|<b> | |style="background:WhiteSmoke; color:black"|<b>Si Etch 01: KOH</b> | ||
|style="background:WhiteSmoke; color:black"|<b> | |style="background:WhiteSmoke; color:black"|<b>Si Etch 02: KOH</b> | ||
|style="background:WhiteSmoke; color:black"|<b> | |style="background:WhiteSmoke; color:black"|<b>Si Etch 03: KOH</b> | ||
|- | |- | ||
!style="background: | !style="background:Silver; color:black;" align="center" width="60" rowspan="2"|Purpose | ||
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*Etch of Silicon in 28 wt% KOH | *Etch of Silicon in 28 wt% KOH | ||
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*Etch of Silicon in 28 wt% KOH | *Etch of Silicon in 28 wt% KOH | ||
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*Etch of Silicon in | *Etch of Silicon in 28 wt% KOH | ||
The bath is dedicated wafers with metal or otherwise dirty wafers | |||
|- | |- | ||
|style="background:LightGrey; color:black"|Link to safety APV and | |style="background:LightGrey; color:black"|Link to safety APV and SDS | ||
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*:[http://labmanager.danchip.dtu.dk/d4Show.php?id= | *:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4964&mach=376 see APV here] | ||
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see | *:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see SDS here] | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id= | *:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4964&mach=376 see APV here] | ||
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see | *:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see SDS here] | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id= | *:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4897&mach=407 see APV here] | ||
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see | *:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see SDS here] | ||
|- | |- | ||
!style="background:silver; color:black" align="center" valign="center" rowspan=" | !style="background:silver; color:black" align="center" valign="center" rowspan="7"|Performance | ||
|style="background:LightGrey; color:black"|Etch rates in crystalline silicon (100) | |style="background:LightGrey; color:black"|Etch rates in crystalline silicon (100) | ||
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*0.4 µm/min (60 °C) | *0.4 µm/min (60 °C) | ||
*0.7 µm/min (70 °C) | |||
*1.3 µm/min (80 °C) | *1.3 µm/min (80 °C) | ||
Etch rates | |- | ||
|style="background:LightGrey; color:black"|Etch rates in crystalline silicon (110) | |||
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*2.5 µm/min (80 °C) | |||
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*2.5 µm/min (80 °C) | |||
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* | *2.5 µm/min (80 °C) | ||
|- | |- | ||
|style="background:LightGrey; color:black"|Etch rates in Thermal SiO2 | |style="background:LightGrey; color:black"|Etch rates in Thermal SiO2 | ||
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*Theoretical values: | *Theoretical values: | ||
*1.2 nm/min (60 °C) | *1.2 nm/min (60 °C) | ||
* | *7.5 nm/min (80 °C) | ||
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*Theoretical values: | *Theoretical values: | ||
*1.2 nm/min (60 °C) | *1.2 nm/min (60 °C) | ||
* | *7.5 nm/min (80 °C) | ||
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*Theoretical values: | |||
*1.2 nm/min (60 °C) | |||
*7.5 nm/min (80 °C) | |||
|- | |- | ||
|style="background:LightGrey; color:black"|Etch rates in | |style="background:LightGrey; color:black"|Etch rates in other oxides | ||
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. | |||
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yannickseis@nbi.ku nov. 2017 @80 °C: | |||
*BPSG from PECVD4: 311nm in about 3 min | |||
*Waveguide oxide from PECVD4: 320nm etched in 26 min | |||
*TEOS oxide from furnace: 300nm etched in 11 min | |||
jemafh@nilt 2019-Marts: | |||
*Standard from PECVD3: selectivity 1:100 to Si | |||
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. | |||
|- | |||
|style="background:LightGrey; color:black"|Etch rates in PECVD SiN | |||
|style="background:WhiteSmoke; color:black"| | |||
|style="background:WhiteSmoke; color:black"|See etchrates for PECVD SiN [https://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Thin_film_deposition/Deposition_of_Silicon_Nitride/Deposition_of_Silicon_Nitride_using_PECVD/PECVD3:_Low_stress_nitride_testing#DOE_made_to_find_a_good_QC_nitride_recipe_with_low_stress_and_low_KOH_etch_rate_(by_Berit_Herstrøm_@_DTU_Nanolab_2016_Marts) here] | |||
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*May be high due to contamination and poor controlled concentration of the KOH solution | *May be high due to contamination and poor controlled concentration of the KOH solution | ||
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|style="background:LightGrey; color:black"|Anisotropy | |style="background:LightGrey; color:black"|Anisotropy | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*The etch rate is very dependent on the crystal orientation of the silicon. | *The etch rate is very dependent on the crystal orientation of the silicon. | ||
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*Mixing ratios giving 28 wt% KOH solutions | *Mixing ratios giving 28 wt% KOH solutions | ||
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution | KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution | ||
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*Mixing ratios giving 28 wt% KOH solutions | *Mixing ratios giving 28 wt% KOH solutions | ||
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution | KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*Mixing ratios giving 28 wt% KOH solutions | *Mixing ratios giving 28 wt% KOH solutions | ||
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution | KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution | ||
|- | |- | ||
|style="background:LightGrey; color:black"|Temperature | |style="background:LightGrey; color:black"|Temperature | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*Max 80 °C (standard etch) | *Max 80 °C (standard etch) | ||
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!style="background:silver; color:black" align="center" valign="center" rowspan="4"|Substrates | !style="background:silver; color:black" align="center" valign="center" rowspan="4"|Substrates | ||
|style="background:LightGrey; color:black"|Batch size | |style="background:LightGrey; color:black"|Batch size | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*1-25 wafers at a time | *1-25 wafers at a time | ||
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|style="background:LightGrey; color:black"|Size of substrate | |style="background:LightGrey; color:black"|Size of substrate | ||
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*4” | *4”-6" wafers | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*4” | *4”-6" wafers | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*2” wafers | *2” wafers | ||
*4” wafers | *4” wafers | ||
*6” wafers | |||
*Small pieces | *Small pieces | ||
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*Silicon oxide | *Silicon oxide | ||
*Silicon (oxy)nitride | *Silicon (oxy)nitride | ||
|style="background:WhiteSmoke; color:black"| | |style="background:WhiteSmoke; color:black"| | ||
*All except for Polymers | *All except for Polymers | ||
|- | |- | ||
|style="background:LightGrey; color:black"|Masking material | |style="background:LightGrey; color:black"|Masking material | ||
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*Stoichiometric Si3N4 | *Stoichiometric Si3N4 | ||
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<sup>{{fn|1}}</sup> Measured by Eric Jensen from DTU-Nanotech, October 2013. | <sup>{{fn|1}}</sup> Measured by Eric Jensen from DTU-Nanotech, October 2013. | ||
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