Specific Process Knowledge/Thermal Process/Annealing: Difference between revisions

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'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Thermal_Process/Annealing click here]'''
''This page is written by DTU Nanolab  internal''
==Annealing==
==Annealing==
At Danchip we have six furnaces for annealing: A1,A3,C1,C2,C3 and C4. Annealing can take place either by a dry process or a wet process. In a wet annealing you will also get some oxidation.


*Dry anneal is used for ? and can be done in furnaces:A1,A3,C1,C2,C3,C4.
At DTU Nanolab  we have five furnaces and two RTP (rapid thermal processor) that can be used for annealing: Anneal-Oxide furnace (C1), Anneal-bond furnace (C3), Al_anneal furnace (C4), Multipurpose Anneal furnace, RTP2 Jipelec and RTP Annealsys (last one, reserved to research). Annealing normally takes place in an N<sub>2</sub> atmosphere, or it can be done in H<sub>2</sub> or a H<sub>2</sub>-N<sub>2</sub> gas mixture in the Multipurpose Anneal furnace. PECVD PBSG glass is annealed in a wet atmosphere which will also oxidize the silicon substrate.
*Wet anneal with H2O in a bubbler is used for ? and can be done in furnaces:C1,C2,C3.
 
A 20-minute N<sub>2</sub> annealing step is also included in all recipes on the oxidation furnace, this annealing is done after the oxidation.
 
==Comparison of the annealing furnaces==


==Comparing the six annealing furnaces==
{|border="1" cellspacing="1" cellpadding="3" style="text-align:left;"  
{| {{table}} border="1" cellspacing="0" cellpadding="8"
| align="center" style="background:#f0f0f0;"|''''''
| align="center" style="background:#f0f0f0;"|'''A1 Boron drive-in'''
| align="center" style="background:#f0f0f0;"|'''A3 Phosphorous drive-in'''
| align="center" style="background:#f0f0f0;"|'''C1 Gate oxide'''
| align="center" style="background:#f0f0f0;"|'''C2 Anneal oxide'''
| align="center" style="background:#f0f0f0;"|'''C3 Anneal bond'''
| align="center" style="background:#f0f0f0;"|'''C4 Anneal aluminium'''
|-
|-
! General description
 
|Drive-in of boron deposited in the boron pre-dep furnace(A2) or drive-in of ion implanted boron. Can also be used for dry and wet oxidation.||Drive-in of phosphorous deposited in the phosphorous pre-dep furnace(A2) or drive-in of ion implanted phosphorous. Can also be used for dry and wet oxidation.||Oxidation of gate-oxide and other especially clean oxides. At the moment also used for general oxidation of 6" wafers.||Annealing and oxidation of wafers from the B-stack and PECVD1.||Annealing and oxidation of wafers from NIL.||Annealing of wafers with aluminium on.
|-
|-
! Dry annealing
|-style="background:silver; color:black"
|x||x||x (with special permission)||x||x||x
|
!
[[Specific_Process_Knowledge/Thermal_Process/C1_Furnace_Anneal-oxide|Anneal Oxide furnace (C1)]]
!
[[Specific_Process_Knowledge/Thermal_Process/C3_Anneal-bond_furnace|Anneal-Bond furnace (C3)]]
!
[[Specific Process Knowledge/Thermal Process/C4 Aluminium Anneal furnace|Aluminium Anneal furnace (C4)]]
!
[[Specific Process Knowledge/Thermal Process/Furnace: Multipurpose annealing|Resist Pyrolysis (research tool)]]
!
[[Specific_Process_Knowledge/Thermal_Process/RTP Jipelec 2| RTP2 Jipelec]]
!
[[Specific_Process_Knowledge/Thermal_Process/RTP Annealsys| RTP Annealsys (research tool)]]
|-
|-
!Wet annealing with bubler (water steam + N2)
 
|||||x (with special permission)||x||x||
|-
|-
!Process temperature
|-style="background:WhiteSmoke; color:black"
|800-1150 <sup>o</sup>C||800-1150 <sup>o</sup>C||800-1150 <sup>o</sup>C||800-1150 <sup>o</sup>C||800-1150 <sup>o</sup>C||800-1150 <sup>o</sup>C
!General description
|Annealing of 4" and 6" wafers. Annealing of wafers from the LPCVD furnaces and from PECVD4.
|Annealing of wafers from Wafer Bonder 02 and from and PECVD4 and PECVD3.
|Annealing of wafers and samples with Al and ALD deposited AL<sub>2</sub>O<sub>3</sub> and TiO<sub>2</sub>
|Resist pyrolysis
|Rapid thermal processing, usually, annealing (RTA).
|Rapid thermal processing: RTA (annealing), RTO (oxidation), RTN (nitridation) and RTH (hydrogenation).
|-
|-
! Batch size
 
|max. 30 wafers of 4" or 2"||max. 30 4" wafers or 2" wafers||max. 30 wafers of 6",4" or 2"||max. 30 4" wafers or 2" wafers||max. 30 4" wafers or 2" wafers||max. 30 4" wafers or 2" wafers
|-
|-
!style="background:#f0f0f0;"|Which wafers are allowed to enter the furnace:
|-style="background:LightGrey; color:black"
| align="center" style="background:#f0f0f0;"|'''A1 Boron drive-in'''
!Annealing gas
| align="center" style="background:#f0f0f0;"|'''A3 Phosphorous drive-in'''
|
| align="center" style="background:#f0f0f0;"|'''C1 Gate oxide'''
*N<sub>2</sub>
| align="center" style="background:#f0f0f0;"|'''C2 Anneal oxide'''
|
| align="center" style="background:#f0f0f0;"|'''C3 Anneal bond'''
*N<sub>2</sub>
| align="center" style="background:#f0f0f0;"|'''C4 Anneal aluminium'''
|
*N<sub>2</sub>
*(Forming gas, 5% H<sub>2</sub>/95% N<sub>2</sub> - Being tested)
|
*N<sub>2</sub>
*(H<sub>2</sub>-N<sub>2</sub> gas mixture)
*Vacuum is possible
|
*Ar
*N<sub>2</sub>
*Low vacuum is possible (min. 2/3 mbar)
|
*Ar
*NH<sub>3</sub>
*O<sub>2</sub>
*5% H<sub>2</sub>/Ar
*High vacuum is possible (10<sup>-6</sup> mbar)
|-
|-
| New clean* Si wafers 4" (6" in C1)||x||x||x (with special permission)||x||x||x
 
|-
|-
| RCA clean** Si wafers with no history of Metals on||x||x||x (with special permission)||x||x||x
|-style="background:WhiteSmoke; color:black"
!Process temperature
|
*700 <sup>o</sup>C - 1100 <sup>o</sup>C
|
*700 <sup>o</sup>C - 1150 <sup>o</sup>C
|
*350 <sup>o</sup>C - 1150 <sup>o</sup>C
*Max 500 <sup>o</sup>C for wafers and samples with Al
|
*Vacuum: 20 <sup>o</sup>C - 1050 <sup>o</sup>C¨
*No vacuum: 20 <sup>o</sup>C - 1050 <sup>o</sup>C
|
*20 <sup>o</sup>C - 1200 <sup>o</sup>C
* '''Max. 100 <sup>o</sup>C/s''' with '''carrier wafer''' or '''sample wafer'''
* '''Max. 50 <sup>o</sup>C/s''' with SiC-coated graphite '''susceptor'''
|
*700 <sup>o</sup>C - 1200 <sup>o</sup>C
*Max. 150 <sup>o</sup>C/s
|-
|-
| From Predep furnace  directly (e.g. incl. Predep HF**)||From A2||From A4||||||||
 
|-
|-
| Wafers directly from PECVD1||||||||x||x||x
|-style="background:LightGrey; color:black"
!Substrate and Batch size
|
*1-30 50 mm wafers
*1-30 100 mm wafers
*1-30 150 mm wafer
*(Small samples on a carrier wafer, horizontal)
|
*1-30 50 mm wafers
*1-30 100 mm wafers
*Small samples on a carrier wafer, horizontal
|
*1-30 50 mm wafers
*1-30 100 mm wafers
*1 150 mm wafer
*Small samples on a carrier wafer, horizontal
|
*1-30 50 mm, 100 mm or 150 mm wafers
*Small samples on a carrier wafer, horizontal
|
*Single-wafer process
*Chips on carrier
*50 mm, 100 mm or 150 mm wafers
|
*Single-wafer process
*Chips on carrier
*100 mm or 150 mm wafers
|-
|-
| Wafers directly from NIL bonding||||||||||x||x
 
|-
|-
|Wafers with aluminium on||||||||||||x
|-style="background:WhiteSmoke; color:black"
!'''Allowed materials'''
|
*All processed wafers have to be RCA cleaned, except wafers from LPCVD furnaces and PECVD4.
|
*All processed wafers have to be RCA cleaned, except wafers from the Wafer Bonder 02 and from PECVD4 and PECVD3.
|
*Wafers and samples with Al and ALD deposited AL<sub>2</sub>O<sub>3</sub> and TiO<sub>2</sub>
|
*Samples for resist pyrolysis.
*No metals allowed
|
*Silicon
*Silicon oxides and nitrides
*Quartz
*Metals - ask for permission
*III-V materials - '''below 440 °C''', otherwise it can lead to outgassing of toxic gases.
|
*Silicon
*Silicon Nitride
*Aluminum Oxide
|-
|-
|}
|}


<nowiki>*</nowiki>New clean: only right from the new clean box. It is not allowed to put them in another box first.
<br clear="all" />
 
<nowiki>**</nowiki>These wafers must be placed in a "transport box from RCA to furnace" using the RCA carrier when doing RCA or the pre-dep carrier after pre-dep.

Latest revision as of 15:12, 7 November 2024

Feedback to this page: click here

This page is written by DTU Nanolab internal

Annealing

At DTU Nanolab we have five furnaces and two RTP (rapid thermal processor) that can be used for annealing: Anneal-Oxide furnace (C1), Anneal-bond furnace (C3), Al_anneal furnace (C4), Multipurpose Anneal furnace, RTP2 Jipelec and RTP Annealsys (last one, reserved to research). Annealing normally takes place in an N2 atmosphere, or it can be done in H2 or a H2-N2 gas mixture in the Multipurpose Anneal furnace. PECVD PBSG glass is annealed in a wet atmosphere which will also oxidize the silicon substrate.

A 20-minute N2 annealing step is also included in all recipes on the oxidation furnace, this annealing is done after the oxidation.

Comparison of the annealing furnaces

Anneal Oxide furnace (C1)

Anneal-Bond furnace (C3)

Aluminium Anneal furnace (C4)

Resist Pyrolysis (research tool)

RTP2 Jipelec

RTP Annealsys (research tool)

General description Annealing of 4" and 6" wafers. Annealing of wafers from the LPCVD furnaces and from PECVD4. Annealing of wafers from Wafer Bonder 02 and from and PECVD4 and PECVD3. Annealing of wafers and samples with Al and ALD deposited AL2O3 and TiO2 Resist pyrolysis Rapid thermal processing, usually, annealing (RTA). Rapid thermal processing: RTA (annealing), RTO (oxidation), RTN (nitridation) and RTH (hydrogenation).
Annealing gas
  • N2
  • N2
  • N2
  • (Forming gas, 5% H2/95% N2 - Being tested)
  • N2
  • (H2-N2 gas mixture)
  • Vacuum is possible
  • Ar
  • N2
  • Low vacuum is possible (min. 2/3 mbar)
  • Ar
  • NH3
  • O2
  • 5% H2/Ar
  • High vacuum is possible (10-6 mbar)
Process temperature
  • 700 oC - 1100 oC
  • 700 oC - 1150 oC
  • 350 oC - 1150 oC
  • Max 500 oC for wafers and samples with Al
  • Vacuum: 20 oC - 1050 oC¨
  • No vacuum: 20 oC - 1050 oC
  • 20 oC - 1200 oC
  • Max. 100 oC/s with carrier wafer or sample wafer
  • Max. 50 oC/s with SiC-coated graphite susceptor
  • 700 oC - 1200 oC
  • Max. 150 oC/s
Substrate and Batch size
  • 1-30 50 mm wafers
  • 1-30 100 mm wafers
  • 1-30 150 mm wafer
  • (Small samples on a carrier wafer, horizontal)
  • 1-30 50 mm wafers
  • 1-30 100 mm wafers
  • Small samples on a carrier wafer, horizontal
  • 1-30 50 mm wafers
  • 1-30 100 mm wafers
  • 1 150 mm wafer
  • Small samples on a carrier wafer, horizontal
  • 1-30 50 mm, 100 mm or 150 mm wafers
  • Small samples on a carrier wafer, horizontal
  • Single-wafer process
  • Chips on carrier
  • 50 mm, 100 mm or 150 mm wafers
  • Single-wafer process
  • Chips on carrier
  • 100 mm or 150 mm wafers
Allowed materials
  • All processed wafers have to be RCA cleaned, except wafers from LPCVD furnaces and PECVD4.
  • All processed wafers have to be RCA cleaned, except wafers from the Wafer Bonder 02 and from PECVD4 and PECVD3.
  • Wafers and samples with Al and ALD deposited AL2O3 and TiO2
  • Samples for resist pyrolysis.
  • No metals allowed
  • Silicon
  • Silicon oxides and nitrides
  • Quartz
  • Metals - ask for permission
  • III-V materials - below 440 °C, otherwise it can lead to outgassing of toxic gases.
  • Silicon
  • Silicon Nitride
  • Aluminum Oxide


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