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== Comparing the three bonding methods in the EVG NIL ==
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'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Bonding click here]'''
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==Bonding==
For bonding samples to a carrier wafer in order to enable '''dry etching''', please go [[Specific_Process_Knowledge/Etch/DryEtchProcessing/Bonding|here]].


!colspan="1" border="none" style="background:silver; color:black;" align="center"|
For bonding samples to a carrier wafer for '''UV-lithography''' using automatic coater and developer, please see this process flow: [[media:Process_Flow_ChipOnCarrier.docx‎|Process_Flow_ChipOnCarrier.docx‎]], and refer to the [[Specific_Process_Knowledge/Etch/DryEtchProcessing/Bonding#Bonding|bonding procedure]] for dry etching.
|style="background:WhiteSmoke; color:black"|<b>[[/Eutectic bonding|Eutectic bonding]]</b>
|style="background:WhiteSmoke; color:black"|<b>[[/Fusion bonding|Fusion bonding]]</b>
|style="background:WhiteSmoke; color:black"|<b>[[/Anodic bonding|Anodic bonding]]</b>
|-
!style="background:silver; width:100px; color:black;" align="center"|General description
|style="background:WhiteSmoke; color:black"|
For bonding two substrates by use of an interphase that makes an eutecticum.
|style="background:WhiteSmoke; color:black"|
For bonding two identical materials.
|style="background:WhiteSmoke; color:black"|
For bonding Si and Glass.
|-
!style="background:silver; color:black" align="center" valign="center"|Bonding temperature
|style="background:WhiteSmoke; color:black"|
Depending on the eutecticum 310°C to 400°C.
|style="background:WhiteSmoke; color:black"|
Depending on defects 50°C to 400°C.
|style="background:WhiteSmoke; color:black"|
Depending on the voltage 300°C to 500°C Standard is 400°C.
|-
 
!style="background:silver; color:black" align="center" valign="center"|Annealing temperature
|style="background:WhiteSmoke; color:black"|
No annealing
|style="background:WhiteSmoke; color:black"|
1000°C in the bond furnace C3.
|style="background:WhiteSmoke; color:black"|
No annealing
|-
 
!style="background:silver; color:black" align="center" valign="center"|Materials possible to bond
|style="background:WhiteSmoke; color:black"|
Bonding of substrates is done by use of the eutectica Au/Si, Au/Sn and Au/Sn/Ni
|style="background:WhiteSmoke; color:black"|
Si/Si, SiO2/SiO2
|style="background:WhiteSmoke; color:black"|
Si/Pyrex (glass)
|-
 
!style="background:silver; color:black" align="center" valign="center"|Substrate size
|style="background:WhiteSmoke; color:black"|
Up to 6" (aligning only possible for 4" and 6")
|style="background:WhiteSmoke; color:black"|
Up to 6" (aligning only possible for 4" and 6")
|style="background:WhiteSmoke; color:black"|
Up to 6" (aligning only possible for 4" and 6") 
|-
 
!style="background:silver; color:black" align="center" valign="center"|Cleaning
|style="background:WhiteSmoke; color:black"|
Cleaning by N2.
|style="background:WhiteSmoke; color:black"|
Wet chemical cleaning, [[Specific Process Knowledge/Wafer cleaning/IMEC|IMEC]].
|style="background:WhiteSmoke; color:black"|
Cleaning by N2. 
|-
 
!style="background:silver; color:black" align="center" valign="center"|IR alignment
|style="background:WhiteSmoke; color:black"|
Double side polished wafers.
|style="background:WhiteSmoke; color:black"|
Double side polished wafers.
|style="background:WhiteSmoke; color:black"|
Not relevant. 
|-
 
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== Choose equipment ==
== Choose equipment ==
*[[/EVG NIL|EVG NIL]]
*[[/Imprinter 02|Imprinter 02]]
*[[/Wafer Bonder 02|Wafer Bonder 02]]
*[[Specific Process Knowledge/Thermal Process/C3 Anneal-bond furnace|C3 furnace anneal bond]]
*[[Specific Process Knowledge/Thermal Process/C3 Anneal-bond furnace|C3 furnace anneal bond]]


== Choose bonding methods in EVG NIL ==
== Choose bonding methods in Wafer Bonder 2 ==


*[[/Eutectic bonding|Eutectic bonding]]
*[[/Eutectic bonding|Eutectic bonding]]
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*[[/Anodic bonding|Anodic bonding]]
*[[/Anodic bonding|Anodic bonding]]


== Comparing the three bonding methods in the EVG NIL ==
== Comparing the three bonding methods in the wafer bonder 2 ==


{| border="2" cellspacing="0" cellpadding="2"  
{| border="2" cellspacing="0" cellpadding="2"  


!colspan="1" border="none" style="background:silver; color:black;" align="center"|
|-style="background:silver; color:black"
|style="background:WhiteSmoke; color:black"|<b>[[/Eutectic bonding|Eutectic bonding]]</b>
!
|style="background:WhiteSmoke; color:black"|<b>[[/Fusion bonding|Fusion bonding]]</b>
![[/Eutectic bonding|Eutectic bonding]]
|style="background:WhiteSmoke; color:black"|<b>[[/Anodic bonding|Anodic bonding]]</b>
![[/Fusion bonding|Fusion bonding]]
![[/Anodic bonding|Anodic bonding]]
|-
|-
!style="background:silver; width:100px; color:black;" align="center"|General description
 
|style="background:WhiteSmoke; color:black"|
|-style="background:WhiteSmoke; color:black"
For bonding two substrates by use of an interphase that makes an eutecticum.  
!General description
|style="background:WhiteSmoke; color:black"|
|For bonding two substrates by use of an interphase that makes an eutecticum.  
For bonding two identical materials.
|For bonding two identical materials.
|style="background:WhiteSmoke; color:black"|
|For bonding Si and Glass.  
For bonding Si and Glass.  
|-
|-
!style="background:silver; color:black" align="center" valign="center"|Bonding temperature
 
|style="background:WhiteSmoke; color:black"|
|-style="background:silver; color:black"
Depending on the eutecticum 310°C to 400°C.  
!Bonding temperature
|style="background:WhiteSmoke; color:black"|
|Depending on the eutecticum 310°C to 400°C.  
Depending on defects 50°C to 400°C.  
|Depending on defects 50°C to 400°C.
|style="background:WhiteSmoke; color:black"|
|Depending on the voltage 300°C to 500°C Standard is 400°C.  
Depending on the voltage 300°C to 500°C Standard is 400°C.  
|-
|-


!style="background:silver; color:black" align="center" valign="center"|Annealing temperature
|-style="background:WhiteSmoke; color:black"
|style="background:WhiteSmoke; color:black"|
!Annealing temperature
No annealing  
|No annealing  
|style="background:WhiteSmoke; color:black"|
|1000°C-1100°C in the anneal bond furnace (C3).  
1000°C in the bond furnace C3.  
|No annealing
|style="background:WhiteSmoke; color:black"|
No annealing
|-
|-


!style="background:silver; color:black" align="center" valign="center"|Materials possible to bond
|-style="background:silver; color:black"
|style="background:WhiteSmoke; color:black"|
!Materials possible to bond
Bonding of substrates is done by use of the eutectica Au/Si, Au/Sn and Au/Sn/Ni  
|Bonding of substrates is done by use of the eutectica Au/Si, Au/Sn and Au/Sn/Ni  
|style="background:WhiteSmoke; color:black"|
|Si/Si, SiO2/SiO2
Si/Si, SiO2/SiO2
|Si/Pyrex (glass)  
|style="background:WhiteSmoke; color:black"|
Si/Pyrex (glass)  
|-
|-


!style="background:silver; color:black" align="center" valign="center"|Substrate size
|-style="background:WhiteSmoke; color:black"
|style="background:WhiteSmoke; color:black"|
!Substrate size
Up to 6" (aligning only possible for 4" and 6")
|Up to 4"
|style="background:WhiteSmoke; color:black"|
|Up to 4"
Up to 6" (aligning only possible for 4" and 6")
|Up to 4"  
|style="background:WhiteSmoke; color:black"|
Up to 6" (aligning only possible for 4" and 6") 
|-
|-


!style="background:silver; color:black" align="center" valign="center"|Cleaning
|-style="background:silver; color:black"
|style="background:WhiteSmoke; color:black"|
!Cleaning
Cleaning by N2.  
|Cleaning by N2.  
|style="background:WhiteSmoke; color:black"|
|Wet chemical cleaning, [[Specific Process Knowledge/Wafer cleaning/IMEC|IMEC]].
Wet chemical cleaning, [[Specific Process Knowledge/Wafer cleaning/IMEC|IMEC]].
|Cleaning by N2.   
|style="background:WhiteSmoke; color:black"|
Cleaning by N2.   
|-
|-


!style="background:silver; color:black" align="center" valign="center"|IR alignment
|-style="background:WhiteSmoke; color:black"
|style="background:WhiteSmoke; color:black"|
!Backside alignment
Double side polished wafers.
|Double side polished wafers.
|style="background:WhiteSmoke; color:black"|
|Double side polished wafers.
Double side polished wafers.
|Not relevant.   
|style="background:WhiteSmoke; color:black"|
Not relevant.   
|-
|-


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