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[[Image:A4_Furnace_PolySi.jpg|300x300px|thumb|A4 Furnace PolySilicon: positioned in cleanroom 2]]
{{cc-nanolab}}
 
'''Feedback to this page''': '''[mailto:thinfilm@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Thin_film_deposition/Furnace_LPCVD_PolySilicon) click here]'''
 
[[Category: Equipment|Thin film LPCVD Poly]]
[[Category: Furnaces|LPCVD Poly]]
[[Category: Thin Film Deposition|LPCVD Poly]]
 
==Deposition of Silicon using LPCVD==
[[Image:A4_Furnace_PolySi.jpg|300x300px|thumb|4" polysilicon furnace (B4) located in cleanroom B-1]]
[[Image:E2.JPG|300x300px|thumb|6" polysilicon furnace located (E2) in cleanroom E-6]]
 
DTU Nanolab has two furnaces for deposition of LPCVD (Low Chemical Vapour Deposition) silicon: A 6" furnace (installed in 2011) for deposition of standard polySi, amorphous Si and boron doped polySi on 100 mm or 150 mm wafers and a 4" furnace (installed in 1995) for deposition of standard polySi, amorphous Si, boron- and phosphorous doped polySi on 100 mm wafers. In LabManager the two furnaces are named "Furnace: LPCVD Poly-Si (4") (B4)" and "Furnace: LPCVD Poly-Si (6") (E2)", respectively. Both furnaces are Tempress horizontal furnaces.
 
The LPCVD silicon deposition is a batch process, where silicon is deposited on a batch of 25 or 50 wafers (6" polySi furnace) or 30 wafers (4" polySi furnace). The silicon has a good step coverage, and especially for standard polySi the film thickness is very uniform over the wafers.
 
The reactive gas is silane (SiH<sub>4</sub>). The dopant for boron doped polySi is BCl<sub>3</sub> - only available at request (6" polySi furnace) or B<sub>2</sub>H<sub>6</sub> (4" polySi furnace), and for phosphorous doped polySi the dopant is PH<sub>3</sub> (4" polySi furnace). For standard and doped polysilion the deposition takes place at a temperature of 600 <sup>o</sup>C - 620 <sup>o</sup>C and a pressure of 200-250 mTorr. For amorphous silicon the deposition temperature is lower, and thus the deposition rate is also lower. For phosphorus doped polySi the deposition rate is approximately ten times lower than for standard and boron doped polySi. Please check the cross contamination information in LabManager before you use any of the two furnaces.
 
 
'''The user manuals, quality control procedures and results, technical information and contact information can be found in LabManager:'''
 
'''[http://www.labmanager.dtu.dk/function.php?module=Machine&view=view&mach=86 4" LPCVD polysilicon furnace (B4)]'''
 
'''[http://www.labmanager.dtu.dk/function.php?module=Machine&view=view&mach=291 6" LPCVD polysilicon furnace (E2)]'''
 
'''[https://labmanager.dtu.dk/d4Show.php?id=1926 Furnace computer manual]'''
 
 
== Manual for the furnace computer to the A, B, C and E stack furnaces ==
 
The A, B, C and E stack furnaces can be controlled either from a touch screen by each furnace or from a furnace computer. The user manual for the furnace computer can be found here:
 
[[Media:Furnace computer manual.pdf|Manual for furnace computers for the A, B, C and E stack furnaces]]
 
==Process information==
 
*[[/Standard recipes, QC limits and results for the 4" polysilicon furnace|Deposition of polysilicon using the B4 4" polysilicon furnace]]
*[[/Boron doped poly-Si and a-Si |Boron doped poly-Si and a-Si by using the B4 4" polysilicon furnace]]
*[[/Phosphorous doped poly-Si|Phosphorous doped poly-Si using the B4 4" polysilicon furnace]]
 
 
*[[/Standard recipes, QC limits and results for the 6" polysilicon furnace|Deposition of polysilicon using the E2 6" polysilicon furnace]]
*[[/Boron doped poly-Si |Boron doped poly-Si using the E2 6" polysilicon furnace]]
 
==Overview of the performance of the LPCVD polysilicon processes and some process related parameters==
 
{| border="2" cellspacing="0" cellpadding="2"
 
!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment
|style="background:WhiteSmoke; color:black"|<b>4" LPCVD polysilicon furnace (B4)</b>
|style="background:WhiteSmoke; color:black"|<b>6" LPCVD polysilicon furnace (E2)</b>
|-
!style="background:silver; color:black;" align="center"|Purpose
|style="background:LightGrey; color:black"|Deposition of
|style="background:WhiteSmoke; color:black"|
*Standard polySi
*Amorphous polySi
*Boron doped polySi (B<sub>2</sub>H<sub>6</sub> dopant)
*Phosphorus doped polySi (PH<sub>3</sub> dopant)
|style="background:WhiteSmoke; color:black"|
*Standard polySi
*Amorphous polySi
*Boron doped polySi (BCl<sub>3</sub> dopant)
|-
!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Performance
|style="background:LightGrey; color:black"|Step coverage
|style="background:WhiteSmoke; color:black"|
*Very Good
|style="background:WhiteSmoke; color:black"|
*Very good
|-
|style="background:LightGrey; color:black"|Film quality
|style="background:WhiteSmoke; color:black"|
*Deposition on both sides of the substrate
*Good uniformity over the wafer
|style="background:WhiteSmoke; color:black"|
*Deposition on both sides of the substrate
*Good uniformity over the wafer
|-
!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range
|style="background:LightGrey; color:black"|Process Temperature
|style="background:WhiteSmoke; color:black"|
*Standard polySi: 620 <sup>o</sup>C
*Amorphous polySi: 560-580 <sup>o</sup>C
*Boron doped a-Si: 580 <sup>o</sup>C
*Phosphorus doped a-Si: 580 <sup>o</sup>C
*Boron doped polySi: 620 <sup>o</sup>C
*Phosphorus doped polySi: 620 <sup>o</sup>C
|style="background:WhiteSmoke; color:black"|
*Standard polySi: 620 <sup>o</sup>C
*Amorphous polySi: 560-580 <sup>o</sup>C
*Boron doped polySi: 600-620 <sup>o</sup>C
 
The process temperature vary over the furnace tube
|-
|style="background:LightGrey; color:black"|Process pressure
|style="background:WhiteSmoke; color:black"|
*200-250 mTorr
|style="background:WhiteSmoke; color:black"|
*150-220 mTorr
The process pressure depends on the process
|-
|style="background:LightGrey; color:black"|Gas flows
|style="background:WhiteSmoke; color:black"|
*SiH<sub>4</sub>: 80 sccm
*B<sub>2</sub>H<sub>6</sub>: 7 sccm
*PH<sub>3</sub>: 7 sccm
|style="background:WhiteSmoke; color:black"|
*SiH<sub>4</sub>: 50-70 sccm
*BCl<sub>3</sub>: 1 sccm
The silane (SiH<sub>4</sub>) flow depends on the process
|-
!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Substrates
|style="background:LightGrey; color:black"|Batch size
|style="background:WhiteSmoke; color:black"|
*1-30 100 mm wafers
Including a testwafer with ~110 nm oxide
|style="background:WhiteSmoke; color:black"|
*1-25 or 1-50 100 mm wafers
*1-25 or 1-50 150 mm wafers
Including a testwafer with ~110 nm oxide
|style="background:WhiteSmoke; color:black"|
|-
| style="background:LightGrey; color:black"|Substrate materials allowed
|style="background:WhiteSmoke; color:black"|
*Silicon wafers (new or RCA cleaned)
**with layers of silicon oxide or silicon (oxy)nitride
**from the A, B and E stack furnaces
*Quartz/fused silica wafers (RCA cleaned)
|style="background:WhiteSmoke; color:black"|
*Silicon wafers (new or RCA cleaned)
**with layers of silicon oxide or silicon (oxy)nitride
**from the A, B and E stack furnaces
*Quartz/fused silica wafers (RCA cleaned)
|-
|}
 
 
== Rules for storage and RCA cleaning of wafers to the B4 and E2 furnaces ==
 
*[[Specific_Process_Knowledge/Thermal_Process/Storage_and_cleaning_of_wafer_to_the_A,_B,_C_and_E_stack_furnaces|Storage and cleaning of wafer to the B4 and E2 furnaces]]