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'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/KOH_Etch click here]'''
'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/KOH_Etch click here]'''


'''Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.'''


'''All links to Kemibrug (SDS) and Labmanager Including APV and QC requires login.'''




[[Category: Equipment|Etch Wet KOH etch]]
[[index.php?title=Category:Equipment|Etch Wet KOH etch]]
[[Category: Etch (Wet) bath|KOH etch]]
[[index.php?title=Category:Etch (Wet) bath|KOH etch]]


==Si etch - ''Anisotropic silicon etch''==
==Si etch - ''Anisotropic silicon etch''==
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KOH belongs to the family of anisotropic Si-etchants based on aqueous alkaline solutions. The anisotropy stems from the different etch rates in different crystal directions. The {111}-planes are almost inert whereas the etch rates of e.g. {100}- and {110}-planes are several orders of magnitude faster.
KOH belongs to the family of anisotropic Si-etchants based on aqueous alkaline solutions. The anisotropy stems from the different etch rates in different crystal directions. The {111}-planes are almost inert whereas the etch rates of e.g. {100}- and {110}-planes are several orders of magnitude faster.


KOH-etching is a highly versatile and cheap way to realize micro mechanical structures if you can live with the necessary Si<sub>3</sub>N<sub>4</sub>- or SiO<sub>2</sub>-masking materials and the potassium contamination of the surface. '''The latter necessitates in most cases a wet post-clean ([[Specific Process Knowledge/Wafer cleaning/7-up & Piranha|'7-up']] or [[Specific Process Knowledge/Wafer cleaning/RCA|RCA-clean]]) if the wafer is to be processed further.'''
KOH-etching is a highly versatile and cheap way to realize micro mechanical structures if you can live with the necessary Si<sub>3</sub>N<sub>4</sub>- or SiO<sub>2</sub>-masking materials and the potassium contamination of the surface. '''The latter necessitates in most cases a wet post-clean ([[Specific Process Knowledge/Wafer cleaning/7-up & Piranha|'7-up']] or [[Specific Process Knowledge/Wafer cleaning/RCA|RCA-clean]]) if the wafer is to be processed further. we also recommend to rinse the wafers in a 5% HCL solution to remove metal ions from the KOH solution.'''  


At Danchip we use as a standard a 28 wt% KOH. The etch rate - and the selectivity towards a SiO<sub>2</sub>-mask - is depending on the temperature. We normally use T=80 <sup>o</sup>C but may choose to reduce this to e.g. 60 <sup>o</sup>C or 70 <sup>o</sup>C in case of a high-precision timed etch (e.g. defining a thin membrane). In some cases we recommend to saturate the standard 28 wt% KOH with IPA with an etch temperature at T=70 <sup>o</sup>C (reduce evaporation of IPA). One example is for boron etch-stop, where the selectivity towards the boron-doped silicon is improved compared to the standard etch. Etching with IPA added to the KOH solution can be done in KOH fumehood.  
At DTU Nanolab we use as a standard a 28 wt% KOH. The etch rate - and the selectivity towards a SiO<sub>2</sub>-mask - is depending on the temperature. We normally use T=80 <sup>o</sup>C but may choose to reduce this to e.g. 60 <sup>o</sup>C or 70 <sup>o</sup>C in case of a high-precision timed etch (e.g. defining a thin membrane). In some cases we recommend to saturate the standard 28 wt% KOH with IPA with an etch temperature at T=70 <sup>o</sup>C (reduce evaporation of IPA). One example is for boron etch-stop, where the selectivity towards the boron-doped silicon is improved compared to the standard etch. Etching with IPA added to the KOH solution (250ml IPA/1000ml KOH) can be done in KOH fumehood.  
   
   
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*[[/ProcessInfo#QC|QC info for standard KOH baths]]
*[[/ProcessInfo#QC|QC info for standard KOH baths]]
*[[/ProcessInfo#Mixing KOH|How to mix KOH]]
*[[/ProcessInfo#Mixing KOH|How to mix KOH]]
*[[/ProcessInfo#Backside protection|Backside protection]]
*[[/ProcessInfo#Theory|Crystal orientation dependency]]
*[[/ProcessInfo#Theory|Crystal orientation dependency]]


==KOH etching baths==
==KOH etching baths==
Key facts for the different etch baths available at Danchip are resumed in the table:
Key facts for the different etch baths available at DTU Nanolab are resumed in the table:
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!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment  
!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment  
|style="background:WhiteSmoke; color:black"|<b>Si Etch 01</b>
|style="background:WhiteSmoke; color:black"|<b>Si Etch 01: KOH</b>
|style="background:WhiteSmoke; color:black"|<b>Si Etch 02</b>
|style="background:WhiteSmoke; color:black"|<b>Si Etch 02: KOH</b>
|style="background:WhiteSmoke; color:black"|<b>Si Etch 03 Fume hood 06</b>
|style="background:WhiteSmoke; color:black"|<b>Si Etch 03: KOH</b>
|-
|-
!style="background:Silver; color:black;" align="center" width="60" rowspan="2"|Purpose  
!style="background:Silver; color:black;" align="center" width="60" rowspan="2"|Purpose  
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|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Etch of Silicon in 28 wt% KOH
*Etch of Silicon in 28 wt% KOH
The bath is dedicated wafer with electroplated Nickel or otherwise dirty wafers
The bath is dedicated wafers with metal or otherwise dirty wafers
|-
|-
|style="background:LightGrey; color:black"|Link to safety APV and KBA
|style="background:LightGrey; color:black"|Link to safety APV and SDS
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4964&mach=376 see APV here]
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4964&mach=376 see APV here]
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see KBA here]
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see SDS here]
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4964&mach=376 see APV here]
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4964&mach=376 see APV here]
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see KBA here]
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see SDS here]
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4897&mach=407 see APV here]
*:[http://labmanager.danchip.dtu.dk/d4Show.php?id=4897&mach=407 see APV here]
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see KBA here]
*:[http://kemibrug.dk/KBA/CAS/106882/?show_KBA=1&portaldesign=1 see SDS here]
|-
|-
!style="background:silver; color:black" align="center" valign="center" rowspan="7"|Performance
!style="background:silver; color:black" align="center" valign="center" rowspan="7"|Performance
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*Theoretical values:
*Theoretical values:
*1.2 nm/min (60 °C)  
*1.2 nm/min (60 °C)  
*6 nm/min (80 °C)
*7.5 nm/min (80 °C)
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|style="background:WhiteSmoke; color:black"|
*Theoretical values:
*Theoretical values:
*1.2 nm/min (60 °C)  
*1.2 nm/min (60 °C)  
*6 nm/min (80 °C)
*7.5 nm/min (80 °C)
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Theoretical values:
*Theoretical values:
*1.2 nm/min (60 °C)  
*1.2 nm/min (60 °C)  
*6 nm/min (80 °C)
*7.5 nm/min (80 °C)
|-
|-
|style="background:LightGrey; color:black"|Etch rates in other oxides  
|style="background:LightGrey; color:black"|Etch rates in other oxides  
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*Waveguide oxide from PECVD4: 320nm etched in 26 min
*Waveguide oxide from PECVD4: 320nm etched in 26 min
*TEOS oxide from furnace: 300nm etched in 11 min
*TEOS oxide from furnace: 300nm etched in 11 min
jemafh@nilt 2019-Marts:
*Standard from PECVD3: selectivity 1:100 to Si
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.
.
|-
|-
|style="background:LightGrey; color:black"|Etch rates in SiN  
|style="background:LightGrey; color:black"|Etch rates in PECVD SiN  
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|See etchrates for PECVD SiN [https://labadviser.nanolab.dtu.dk/index.php?title=Specific_Process_Knowledge/Thin_film_deposition/Deposition_of_Silicon_Nitride/Deposition_of_Silicon_Nitride_using_PECVD/PECVD3:_Low_stress_nitride_testing#DOE_made_to_find_a_good_QC_nitride_recipe_with_low_stress_and_low_KOH_etch_rate_(by_Berit_Herstrøm_@_DTU_Nanolab_2016_Marts) here]
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|-
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|style="background:WhiteSmoke; color:black"|
*Mixing ratios giving 28 wt% KOH solutions
*Mixing ratios giving 28 wt% KOH solutions
KOH:H<sub>2</sub>O - 500 g : 1000 ml, when using pills
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Mixing ratios giving 28 wt% KOH solutions
*Mixing ratios giving 28 wt% KOH solutions
KOH:H<sub>2</sub>O - 500 g : 1000 ml, when using pills
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Custom made
*Mixing ratios giving 28 wt% KOH solutions
KOH:H<sub>2</sub>O - 1000 ml: 1200 ml, when using premixed 50% KOH solution
|-
|-
|style="background:LightGrey; color:black"|Temperature
|style="background:LightGrey; color:black"|Temperature
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<sup>{{fn|1}}</sup> Measured by Eric Jensen from DTU-Nanotech, October 2013.
<sup>{{fn|1}}</sup> Measured by Eric Jensen from DTU-Nanotech, October 2013.
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===Definition of structures===
Due to the almost inert (111)-planes it is possible by KOH etching to realize high aspect ratio structures in sigle crytalline silicon using the (111)-planes as sidewalls. In Si(100) these sidewalls are inclined - 54.7<sup>o</sup> with respect to the (100) surface - whereas in Si(110) the sidewalls are vertical (see figures below).
<gallery caption="Anisotropic wet silicon etch: dependency on crystal orientation" widths="380px" heights="150px" perrow="2">
Image:KOH_Anisotropy.jpg|Etched profile when etching Si(100).
Image:KOH_Anisotropy(110).jpg|Etched profile when etching Si(110).
</gallery>
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For Si(100), the relation between the width of the bottom of the etched groove (W<sub>b</sub>) and the width of the opening (W<sub>o</sub>) at the wafer surface in a groove etched to the depth l is given by:
<math>W_b = W_o - 2lcot(54.7^o) = W_o - \sqrt{2} l</math>
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===Definition of <110> alignment structures===
The etch rate dependence on the crystallographic planes can be used to determine the <110> crystal directions with high precision (better than +/- 0.05 <sup>o</sup>). A fast method for doing this, using the symmetric under-etching behavior around but not at the <110>-directions, was described by Vangbo and Bäcklund in J. Micromech. Microeng.'''6''' (1996), 279-284. High-precision control of the <110>-direction during alignment can be necessary in order to control the dimensions of KOH-etched structures (e.g. precise control of V-groove dimensions). A dedicated mask (MASK NAME) has been designed for this purpose.
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===Etch rates: Empirical formula (Seidl et al)===
The following empirical formula can be used for concentrations in the range of 10-60 wt%:
R = k<sub>0</sub> [H<sub>2</sub>O]<sup>4</sup> [KOH]<sup>0.25</sup> e<sup>-E<sub>a</sub>/kT</sup>,
where k<sub>0</sub> = 2480 µm/hr (mol/l)<sup>-4.25</sup>, E<sub>a</sub> = 0.595 eV for Si(100)
and  k<sub>0</sub> = 4500 µm/hr (mol/l)<sup>-4.25</sup>, E<sub>a</sub> = 0.60 eV for Si(110)
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