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Specific Process Knowledge/Etch/Etching of Bulk Glass: Difference between revisions

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Etching of Glass can be done either wet or dry. For wet etching please see below on this page. Dry etching can be done either with [[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)|AOE]] using Flourine chemistry (only fused silica) or with [[Specific Process Knowledge/Etch/IBE/IBSD Ionfab 300|IBE]] by sputtering with Ar ions and/or using Flourine chemistry.  
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At Danchip, we have two types of bulk glass substrates: Borosilicate glass (Borofloat 33 (like pyrex)) and fused silica glass which in cleanliness is similar to quartz. Both types are etched wet in a special set-up placed in a fumehood using a strong HF-solution (isotropic etch).
== Comparing methods for etching bulk glass at DTU Nanolab ==
The set-up consists of a 5L plasic beaker placed on a stirring plate (magnetic stirring) and a special horizontal wafer holder. Normally a 40% pre-mixed HF solution is used.
 
Etching of glass can be done either wet or dry. Wet etching is done with HF. Dry etching can be done either with [[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)|AOE]], ASE or Pegasus 4 using fluorine chemistry (only fused silica) or with [[Specific Process Knowledge/Etch/IBE⁄IBSD Ionfab 300|IBE]] by sputtering with Ar ions and/or using fluorine chemistry.
 
At DTU Nanolab, we have two types of bulk glass substrates: Borosilicate glass (Borofloat 33 (like pyrex)) and fused silica glass which in cleanliness is similar to quartz. Both types are etched wet in a special set-up placed in a fumehood using a concentrated HF-solution (isotropic etch).
The set-up consists of a 5L plastic beaker placed on a stirring plate (magnetic stirring) and a special horizontal wafer holder. Normally a 40% pre-mixed HF solution is used.


Masking materials and pre-treatment of the glass surface prior to the deposition of the masking material is a special concern in particular for deep etching (> 10µm).   
Masking materials and pre-treatment of the glass surface prior to the deposition of the masking material is a special concern in particular for deep etching (> 10µm).   
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Due to the high cleanliness fused silica is allowed access to basically all machines meaning that e.g. LPCVD silicon can be deposited as masking material. This is an excellent mask even for quite deep etches.
Due to the high cleanliness fused silica is allowed access to basically all machines meaning that e.g. LPCVD silicon can be deposited as masking material. This is an excellent mask even for quite deep etches.


Regarding borosilicate glass masking is more tricky. The following sequence has been used with some success (using sputtered silicon from the Alcatel):
Regarding borosilicate glass masking is more tricky. Sputtered Si, Cr or Cr/Au can be used. It is a challenge to avoid delamination, pinholes and cracks in the masking material. 


* Piranha clean
* Bake-out at 250 <sup>o</sup>C (>2.5 hours)
* Plasma ashing
* Sputter-deposit in Alcatel: Power: 550W, Ar-pressure: 10<math>^{-2}</math> mbar (base pressure: 10<math>^{-6}</math> mbar)
* Patterning of the silicon using either wet (poly-etch) or dry etching


==Process Advice==
*[[/AOE etching of fused silica|AOE etching of fused silica]]
*[[Specific Process Knowledge/Etch/Etching of Bulk Glass/Deep Wet Etch in Glass|Deep etch in Glass]]
*[[/HF Etch of Glass|HF Etch of Glass (fused silica and borofloat)]]


 
==Compare the methods for bulk glass etching==
==Overview: Wet HF-etch of bulk glass==
{| border="2" cellspacing="0" cellpadding="4" align="center"
!
! Fused silica
! Borofloat glass
|- valign="top"
|'''General description'''
|
*40% pre-mixed HF
|
*40% pre-mixed HF
|
|-valign="top"
|'''Possible masking materials'''
|
*[[Specific Process Knowledge/Thin film deposition/Deposition of Silicon|LPCVD silicon]] (good adhesion and step coverage)
|
*[[Specific Process Knowledge/Thin film deposition/Deposition of Silicon|Sputtered silicon (Alcatel)]] (bad adhesion and step coverage)
*We are testing other masks at the moment (ask BGE)
|
|- valign="top"
|'''Etch rate'''
|
*~700 nm/min (patterned silica, slow stirring)
*~800 nm/min (non-patterned silica, slow stirring)
|
*~3,9 µm/min 
|
|-valign="top"
|'''Uniformity'''
|
*~ 2% (slow stirring, horizontal wafer)
|
|
|-valign="top"
 
|'''Batch size'''
|
*1 wafers at a time
|
*1 wafer at a time
|
|-valign="top"
|'''Size of substrate'''
|
*4" wafers
|
*4" wafers
|
|-valign="top"
|'''Allowed materials'''
|
*No restrictions
|
*No restrictions
|
|-
|}
 
 
= This section is under construction [[Image:section under construction.jpg|70px]]=
 
'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_Bulk_Glass click here]'''
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== Comparing methods for etchng bulk glass at Danchip [[Image:section under construction.jpg|70px]]==
 
There are a broad varity of silicon oxide etch methods at Danchip. The methodes are compared here to make it easier for you to compare and choose the one that suits your needs.
 
*[[Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF)|Wet Silicon Oxide Etch]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using RIE1 or RIE2|SiO2 etch using RIE1 or RIE2]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using AOE|SiO2 etch using AOE]]
*[[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
 
==Compare the methods for Silicon Oxide etching==


{|border="1" cellspacing="1" cellpadding="3" style="text-align:left;"  
{|border="1" cellspacing="1" cellpadding="3" style="text-align:left;"  
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!
!
![[Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF)|Wet Silicon Oxide etch (BHF/HF)]]
![[Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF)|Wet Silicon Oxide etch (BHF/HF)]]
![[Specific Process Knowledge/Etch/RIE (Reactive Ion Etch)|RIE (Reactive Ion Etch)]]
![[Specific Process Knowledge/Etch/ASE (Advanced Silicon Etch)|ASE]]
![[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)|AOE (Advanced Oxide Etch)]]
![[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)|AOE (Advanced Oxide Etch)]]
![[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
![[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
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*DUV resist
*DUV resist
*E-beam resist
*E-beam resist
*Silicon Oxide
*(Poly)Silicon
*Silicon Nitride
*Silicon Nitride
*Metals if they cover less than 5% of the wafer area (ONLY RIE2!)
*Metals if they cover less than 5% of the wafer area
|
|
*Photoresist
*Photoresist
*DUV resist
*DUV resist
*E-beam resist
*E-beam resist
*Silicon Oxide
*(Poly)Silicon
*Silicon Nitride
*Silicon Nitride
*Aluminium
*Aluminium
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|
|
*~75 nm/min (Thermal oxide) in BHF
*~75 nm/min (Thermal oxide) in BHF
*~90 nm/min (Thermal oxide) in SIO Etch
*~80 nm/min (Thermal oxide) in BOE 7:1 Etchant VLSI with Surfactant
*~25 nm/min (Thermal oxide) in 5%HF
*~25 nm/min (Thermal oxide) in 5%HF
*~3-4µm/min in 40%HF
*~3-4µm/min in 40%HF
|
|
*Process dependent
*Process dependent
*Tested range: ~20nm/min - ~120nm/min  
*Expected range: ~ less than 20 nm/min - ~200 nm/min  
|
|
*Process dependent
*Process dependent
*Tested range: ~230nm/min - ~550nm/min
*Expected range: ~ less than 230 nm/min - ~550 nm/min
|
|
*Process dependent
*Process dependent
*Tested once ~22nm/min
*Expected ~10-30 nm/min
|-
|-


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!Substrate size
!Substrate size
|
|
*<nowiki>#</nowiki>1-25 100mm wafers in our 100mm bath
*<nowiki>#</nowiki>1-25 100 mm wafers in our 100mm bath
*What can be fitted in a plastic beaker
*What can be fitted in a plastic beaker
|
|
*As many small samples as can be fitted on the 100mm carrier.
*As many small samples as can be fitted on the 100mm carrier (bad/no cooling!)
*<nowiki>#</nowiki>1 100mm wafer (or smaller with carrier)
*<nowiki>#</nowiki>1 100mm wafer (or smaller with carrier)
*<nowiki>#</nowiki>1 150mm wafer (only RIE2 when set up for 150mm)  
*<nowiki>#</nowiki>1 150mm wafer (only when set up for 150mm)  
|
|
*As many small samples as can be fitted on a 100mm wafer
*As many small samples as can be fitted on a 100mm wafer
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*DUV resist
*DUV resist
*E-beam resist
*E-beam resist
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
*Other metals if they cover less than 5% of the wafer area
*Quartz/fused silica
*Quartz/fused silica
|
|