Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4/SiO2 Etch/Cr mask: Difference between revisions
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=SiO2 trench etching with Cr mask= | =SiO2 trench etching with Cr mask= | ||
{| border="2" cellspacing="2" cellpadding="3" | {| border="2" cellspacing="2" cellpadding="3" | ||
!Start parameters, variations noted in the gallery headline | !Start parameters, variations noted in the gallery headline | ||
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|Running 1800W/150W at increased time to etch down to 1500 nm. | |Running 1800W/150W at increased time to etch down to 1500 nm. | ||
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier '''10 min etch''', H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px"> | <gallery caption="C10161 SiO2 etch with Cr mask on wafer piece on Si carrier '''10 min etch''', H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.6mTorr; platen power 150W, coil power:1800W" perrow="6" widths="200px" heights="150px"> | ||
File:C10161_01.jpg | File:C10161_01.jpg | ||
File:C10161_03.jpg | File:C10161_03.jpg | ||
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|Repeating the 1200W/100W recipes at 14 min but without the EM coils. For this recipe the uniformity over the wafer improved from removing the EM coils, so no need for those and now the recipe could run 14 min without damaging the hardware. The profile looked as before. After removing the Cr I looked from the top and with a tilted view and saw the the sidewall roughness was very bad. | |Repeating the 1200W/100W recipes at 14 min but without the EM coils. For this recipe the uniformity over the wafer improved from removing the EM coils, so no need for those and now the recipe could run 14 min without damaging the hardware. The profile looked as before. After removing the Cr I looked from the top and with a tilted view and saw the the sidewall roughness was very bad. | ||
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<gallery caption="SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.9mTorr; platen power 100W, coil power:1200W | <gallery perrow="7" widths="200px" heights="150px" caption="C10184: SiO2 etch with Cr mask on wafer piece on Si carrier 14 min etch, EM:0/0 H2:0sccm, C4F8:13sccm He:205sccm O2:20sccm, Pressure:3.9mTorr; platen power 100W, coil power:1200W"> | ||
File:C10184_01.jpg | File:C10184_01.jpg | ||
File:C10184_05.jpg | File:C10184_05.jpg | ||
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File:C010184tilt20plasmaO2_07.jpg| tilt 20 degrees | File:C010184tilt20plasmaO2_07.jpg| tilt 20 degrees | ||
File:C010184tilt20plasmaO2_05.jpg| tilt 20 degrees | File:C010184tilt20plasmaO2_05.jpg| tilt 20 degrees | ||
File:C1018405.jpg|After RCA clean | |||
File:C1018402.jpg|After RCA clean | |||
File:C1018403.jpg|After RCA clean | |||
</gallery> | </gallery> | ||
|- style="vertical-align:top;" | |- style="vertical-align:top;" | ||
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File:C10844_13.jpg | File:C10844_13.jpg | ||
</gallery> | </gallery> | ||
|- style="vertical-align:top;" | |||
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*Coil Power [W]:300 | |||
*'''Platen Power [W]: 25''' | |||
*Platen temperature [<sup>o</sup>C]: 20 | |||
*H2 flow [sccm]:0 | |||
*O2 flow [sccm]: 10 | |||
*C<sub>4</sub>F<sub>8</sub> flow [sccm]: 11.5 | |||
*He flow [sccm]:100 | |||
*Pressure:Fully open APC valve (<2 mTorr) | |||
*Electromagnetic coils (EM) 'outer coil' / 'inner coil':'0 A' / '0 A' | |||
|After some major chemical cleans I could not repeat the results of C10834. I need to increase the C4F8 to fairly match the results | |||
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<gallery caption=" C12508: SiO2 etch with Cr mask on wafer piece on Si carrier 50 min etch, EM:0/0 H2:0sccm, C4F8:11.5sccm He:100sccm O2:10sccm, Pressure:?mTorr; platen power 25W, coil power:300W" perrow="6" widths="200px" heights="150px"> | |||
File:C12508_03__14.jpg | |||
File:C12508_03__02.jpg | |||
File:C12508_03__04.jpg | |||
File:C12508_03__06.jpg | |||
File:C12508_03__07.jpg | |||
File:C12508_03__09.jpg | |||
File:C12508_03__12.jpg | |||
</gallery> | |||
|} | |} | ||