Specific Process Knowledge/Etch/ICP Metal Etcher/silicon oxide: Difference between revisions

← Older edit

VisualWikitext

@@ Line 1: / Line 1: @@
+{{CC-bghe1}}
 '''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/ICP_Metal_Etcher/silicon_oxide click here]'''
+<br>
-It is possible to etch SiO2 in the ICP metal etcher but it is not designed for it and the results are not fantastic. It is a challenge to get a good selectivity to resist (typically in the range of 1:1 or worse) and it is probably not possible to get a profile angle of 90 degrees. More likely about 75-85 degrees. Different chemistries can be applied either based on CF4 or C4F8. If seems that C4F8 can give the best selectivity to resist (best case I have seem was 1:11 but it depends a lot on the process parameters)).  If low coil power is needed CF4 chemistry is used because C4F8 needs a higher power to generate a plasma. ''/bghe 2016-04-25 ''
+=SiO2 etching in the ICP metal=
+It is possible to etch SiO2 in the ICP metal etcher but it is not designed for it and we prefer that you do it elsewhere. It is a challenge to get a good selectivity to resist (typically in the range of 1:1 or worse) and it is probably not possible to get a profile angle of 90 degrees. More likely about 75-85 degrees. Different chemistries can be applied either based on CF4 or C4F8. If seems that C4F8 can give the best selectivity to resist (best case I have seem was 1:11 but it depends a lot on the process parameters)).  If low coil power is needed CF4 chemistry is used because C4F8 needs a higher power to generate a plasma. ''/bghe 2016-04-25 ''
 ==Slow etch of SiO2 with resist as masking material - using a 6" carrier wafer with recess ==
@@ Line 156: / Line 160: @@
 |
 *Sample: s007592 ''by bghe@nanolab (2015-06-02)''
-*See Martin Lind Ommen's results with hard masks in Process2share: [http://process2share.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_SiO2] <br> There were problems with polymer on the surface after etching.
+*See Martin Lind Ommen's results with hard masks: [https://labadviser.nanolab.dtu.dk//index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon_Oxide#Dry_etch_with_Hard_mask] <br> There were problems with polymer on the surface after etching.
 |}