Specific Process Knowledge/Etch/ICP Metal Etcher/silicon oxide: Difference between revisions
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{{CC-bghe1}} | |||
It is possible to etch SiO2 in the ICP metal etcher but it is not designed for it and | '''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/ICP_Metal_Etcher/silicon_oxide click here]''' | ||
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=SiO2 etching in the ICP metal= | |||
It is possible to etch SiO2 in the ICP metal etcher but it is not designed for it and we prefer that you do it elsewhere. It is a challenge to get a good selectivity to resist (typically in the range of 1:1 or worse) and it is probably not possible to get a profile angle of 90 degrees. More likely about 75-85 degrees. Different chemistries can be applied either based on CF4 or C4F8. If seems that C4F8 can give the best selectivity to resist (best case I have seem was 1:11 but it depends a lot on the process parameters)). If low coil power is needed CF4 chemistry is used because C4F8 needs a higher power to generate a plasma. ''/bghe 2016-04-25 '' | |||
==Slow etch of SiO2 with resist as masking material - using a 6" carrier wafer with recess == | ==Slow etch of SiO2 with resist as masking material - using a 6" carrier wafer with recess == | ||
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|-style="background:Black; color:White" | |-style="background:Black; color:White" | ||
!Results | !Results | ||
!Test on wafer with 50% load (Travka 50), by BGHE @ | !Test on wafer with 50% load (Travka 50), by BGHE @nanolab | ||
!100% load on 100mm wafers with Barc and KRF (no mask) | !100% load on 100mm wafers with Barc and KRF (no mask) | ||
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|'''~0.9''' (SiO2:resist) | |'''~0.9''' (SiO2:resist) | ||
|'''~1.25:1 (Barc:KRF) | |'''~1.25:1 (Barc:KRF) | ||
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|Etch rate in silicon | |||
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bghe@Nanolab 20190117 | |||
*33.8 nm/min (middle of wafer with 80% load) bghe@Nanolab 20190117 | |||
*34.3 nm/min (edge of wafer with 80% load) | |||
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|Wafer uniformity (100mm) | |Wafer uniformity (100mm) | ||
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*[[/By Peixiong|Tests done by Peixiong]] | *[[/By Peixiong|Tests done by Peixiong]] | ||
*[[/By BGHE|Tests done by Berit]] | *[[/By BGHE|Tests done by Berit]] | ||
*Test by Zhibo Li @ | *Test by Zhibo Li @nanolab ''dec. 2016'' - based on the work of Peixiong and Berit: [[:File:Zhibo Li SiO2 ICP etch (dose205).docx]] | ||
<br/> | <br/> | ||
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|Etch rate of thermal oxide | |Etch rate of thermal oxide | ||
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*'''145-172 nm/min''' ''by bghe@ | *'''145-172 nm/min''' ''by bghe@nanolab (2015-06-02)'' | ||
*'''145 nm/min ''' ''by Martin Lind Ommen (fall 2016)'' | *'''145 nm/min ''' ''by Martin Lind Ommen (fall 2016)'' | ||
|- | |- | ||
|Selectivity to resist [:1] | |Selectivity to resist [:1] | ||
| 4-5:1 (SiO2:resist) ''by bghe@ | | 4-5:1 (SiO2:resist) ''by bghe@nanolab (2015-06-02)'' | ||
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|Cr etch rate | |Cr etch rate | ||
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|Profile [<sup>o</sup>] | |Profile [<sup>o</sup>] | ||
|86-87 dg ''by bghe@ | |86-87 dg ''by bghe@nanolab (2015-06-02)'' | ||
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|Wafer uniformity map (click on the image to view a larger image) | |Wafer uniformity map (click on the image to view a larger image) | ||
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|SEM profile images | |SEM profile images | ||
|[[File:ICP metal s007592_21.jpg|200px]] [[File:ICP metal s007592_24.jpg|200px]]<br> ''by bghe@ | |[[File:ICP metal s007592_21.jpg|200px]] [[File:ICP metal s007592_24.jpg|200px]]<br> ''by bghe@nanolab (2015-06-02)'' | ||
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|Etch rate in barc | |Etch rate in barc | ||
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|Etch rate in KRF resist | |Etch rate in KRF resist | ||
|34 nm/min ''by bghe@ | |34 nm/min ''by bghe@nanolab (2015-06-02)'' | ||
|- | |- | ||
|Comments | |Comments | ||
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*Sample: s007592 ''by bghe@ | *Sample: s007592 ''by bghe@nanolab (2015-06-02)'' | ||
*See Martin Lind Ommen's results with hard masks | *See Martin Lind Ommen's results with hard masks: [https://labadviser.nanolab.dtu.dk//index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon_Oxide#Dry_etch_with_Hard_mask] <br> There were problems with polymer on the surface after etching. | ||
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|-style="background:Black; color:White" | |-style="background:Black; color:White" | ||
!Results | !Results | ||
!Test on wafer with 50% load (Travka 50), by BGHE @ | !Test on wafer with 50% load (Travka 50), by BGHE @nanolab | ||
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|Etch rate of thermal oxide | |Etch rate of thermal oxide | ||
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**same step size: 20nm | **same step size: 20nm | ||
**px1283mk: alignment mark for finfet | **px1283mk: alignment mark for finfet | ||
**dose 280uc 3x3 at x pitch 10mm y | **dose 280uc 3x3 at x pitch 10mm y pitch 10 mm in wafer center | ||
px1283lablejan1542014t1 250uc | px1283lablejan1542014t1 250uc | ||
at 40mm x y | at 40mm x y | ||
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**494.53nm | **494.53nm | ||
**SiO2 etched 1152-495=657nm | **SiO2 etched 1152-495=657nm | ||
**SiO2 etch rate: | **SiO2 etch rate: 131 nm/min | ||
*sem zeiss, 1:50am Jan162014 still as over | *sem zeiss, 1:50am Jan162014 still as over 200 nm zep remains on the wafer for line400p1000, need high dose as 320uc. 280uc is not enough to go through 560 nm thick zep520A | ||
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|-style="background:Black; color:White" | |-style="background:Black; color:White" | ||
!Results | !Results | ||
!Test on 6" wafer, by Peixiong Shi@ | !Test on 6" wafer, by Peixiong Shi@nanolab | ||
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|Etch rate of thermal oxide | |Etch rate of thermal oxide | ||