Jump to content

Specific Process Knowledge/Lithography/EBeamLithography/JEOLJobPreparation: Difference between revisions

← Older edit
VisualWikitext
Thope (talk | contribs)
DCH-Employees-701, NLAB-Employees-701, NLAB-LabmanagerAllUsers, NLAB-Nlab347-labadviser-users-35231
2,178 edits
Elelop (talk | contribs)
NLAB-Employees-701, NLAB-LabmanagerAllUsers, NLAB-Nlab307-labadviser-users-34891, NLAB-Nlab347-labadviser-users-35231
26 edits
 
(28 intermediate revisions by one other user not shown)
Line 37: Line 37:


In the following we will discuss details of the most commonly used commands in the SDF and JDF and provide example files for various types of jobs. We will start with a simple exposure without pattern alignment, i.e. a first print exposure. In JEOL terminology this is called “mask exposure mode” whereas exposure with alignment is refered to as “direct exposure mode”.
In the following we will discuss details of the most commonly used commands in the SDF and JDF and provide example files for various types of jobs. We will start with a simple exposure without pattern alignment, i.e. a first print exposure. In JEOL terminology this is called “mask exposure mode” whereas exposure with alignment is refered to as “direct exposure mode”.
Templates for SDF and JDF files can be found on the Cleanroom drive here: O:\CleanroomDrive\_JEOL9500Training\Templates


=First print - mask exposure mode=
=First print - mask exposure mode=
Line 51: Line 53:
ACC 100                       
ACC 100                       
CALPRM '2na_ap4'             
CALPRM '2na_ap4'             
DEFMODE 2                    
DEFMODE 2  
FFOCUS                   
RESIST 240                     
RESIST 240                     
SHOT A,16                       
SHOT A,16                       
Line 90: Line 93:


This parameter determines if the system writes in 2 deflector mode or 1 deflector mode. In 2 deflector mode the primary deflector positions the beam within the main writing field with the subdeflector positions the beam with each 4 x 4 µm subfield. Writing speed is significantly higher in 2 deflector mode and the system should always be used in mode 2.
This parameter determines if the system writes in 2 deflector mode or 1 deflector mode. In 2 deflector mode the primary deflector positions the beam within the main writing field with the subdeflector positions the beam with each 4 x 4 µm subfield. Writing speed is significantly higher in 2 deflector mode and the system should always be used in mode 2.
'''FFOCUS'''
Field Focus was added to the system in 2021. It allows the system to adjust beam focus individually for each writing field based on a sample surface height map generated with HEIMAP. If FFOCUS is omitted the HEIMAP matrix will be used to calculated a single average sample height and beam focus will be set to this value. If FFOCUS is used the HEIMAP data will be used to generate a surface map and each individual writing field will be exposed with a beam focus based on this surface map. This function can not be used with height data obtained from SETWFR or CHIPAL.


'''RESIST [dose]'''
'''RESIST [dose]'''
Line 187: Line 194:
Also notice that if an array element is assigned several times, it is the last assignment that will be used.
Also notice that if an array element is assigned several times, it is the last assignment that will be used.


The ASSIGN command can be used to build arrays of arrays to a depth of 9 sub arrays. For examples of sub arrays please refer to our specific page on the ASSIGN command.
The ASSIGN command can be used to build arrays of arrays to a depth of 9 sub arrays.


'''SKIP (j,k)'''
'''SKIP (j,k)'''
Line 225: Line 232:
|-  
|-  
| colspan="1" style="text-align:center;|
| colspan="1" style="text-align:center;|
Illustration of wafer scale pattern alignment and chip array alignment for two designs, L1 and L2.
Illustration of wafer scale pattern alignment and chip array alignment for two designs, L1 and L2. The goal is to align the L2 pattern to the L1 pattern.  
|}
|}


Line 248: Line 255:
RESIST 152                   
RESIST 152                   
SHOT A,32                   
SHOT A,32                   
OFFSET(0,0)                   
OFFSET(-150,233)                   


END 8
END 8
Line 275: Line 282:


'''HSWITHC''' specifies the substrate height detection mode for aligned exposure. It takes two parameters '''swg''' and '''swc''' which are merely two ON/OFF switches for global mark and chip marks, respectively. If '''swg''' is set to ON the system will carry out substrate height measurement at the global mark positions. If '''swc''' is set to ON the system will carry out substrate height measurement at the chip mark positions. Thus this is a convenient way to have the system measure substrate height and adjust beam focus to chip placement positions. In the example above the global mark positions are used for height detection of the substrate.
'''HSWITHC''' specifies the substrate height detection mode for aligned exposure. It takes two parameters '''swg''' and '''swc''' which are merely two ON/OFF switches for global mark and chip marks, respectively. If '''swg''' is set to ON the system will carry out substrate height measurement at the global mark positions. If '''swc''' is set to ON the system will carry out substrate height measurement at the chip mark positions. Thus this is a convenient way to have the system measure substrate height and adjust beam focus to chip placement positions. In the example above the global mark positions are used for height detection of the substrate.
'''OFFSET[x,y]'''
For aligned exposures the '''OFFSET''' command must be used to state the offset of the P mark as determined by the optical pre-aligner. This offset will be applied to the entire content of the JDF file, i.e. the offset is used to shift the mark scan detection position. In the example above the pre-aligner was used to determine the P mark is shifted -150 µm in x and 233 µm in y relative to the center of the exposure/cassette slot.


===Global alignment JDF===
===Global alignment JDF===
Line 311: Line 323:


==Chip alignment==
==Chip alignment==
Chip alignment requires a global alignment to be made first to establish the wafer coordinate system.
Chip alignment requires a global alignment to be made first to establish the wafer coordinate system. Hence a global alignment using '''GLMDET''' is used initially as in the example above. To further illustrate chip alignment we will look at a particular layout shown below. The layout also illustrates a commonly used feature on the JEOL system to create arrays of arrays. In the layout below there is main 2x2 array and into each of these is a 5x5 subarray. Each element of the subarray is a single chip with four chip alignment marks. Notice that array placement is given in the substrate coordinate system and so is the global mark positions. Chip alignment marks (M1-M4) are however given in the local chip coordinate system. In the example files below we assume L1 is already defined on the substrate and we wish to align L2 to it.
 
Since a pattern (V30 file) is placed at the center of the bounding box it is essential to control the bounding box of the chip design. The design in this case appears symmetric around (0,0) but in order to force it to be symmetric it is common to place corner marks at equidistance points from (0,0). The corner marks can be 1 nm boxes that will not show up in the resist when developed.


{| style="border: none; border-spacing: 0; margin: 1em auto; text-align: center;"
{| style="border: none; border-spacing: 0; margin: 1em auto; text-align: center;"
Line 318: Line 332:
|-  
|-  
| colspan="1" style="text-align:center;|
| colspan="1" style="text-align:center;|
Illustration of chip alignment using a chip array instanced into another array.
Illustration of chip alignment using a chip array instanced into another array. Notice in the right most illustration how four corner marks are used to force symmetry around (0,0) such that the pattern is placed correctly.
|}
|}


===Chip alignment - SDF ===
===Chip alignment SDF ===


<pre>
<pre>
MAGAZIN 'THOPE'
MAGAZIN 'THOPE'


;---------------------------
#8
#8
%4C     
%4C     
JDF 'thope230111A',1
JDF 'thope230126',1
ACC 100
ACC 100
CALPRM '6na_ap5'
CALPRM '6na_ap5'
DEFMODE 2      ;2_stage deflection
DEFMODE 2       
GLMDET S
GLMDET S
CHIPAL 1
CHIPAL 1
Line 340: Line 352:
SHOT A,6
SHOT A,6
OFFSET(-44,-139)
OFFSET(-44,-139)
;---------------------------


END 8
END 8
</pre>
</pre>


==Chip alignment - JDF ===
 
'''CHIPAL [mode]'''
 
'''CHIPAL''' has six modes
 
*0 - Cancels chip alignment
*S - SEM mode. The user is prompted to use SEM mode to manually find M1
*1 - One mark is used for position correction
*4 - Four marks are used for position, rotation and gain correction
*V1 - Virtual mode 1. A single mark position is used for height detection of the substrate, no position correction
*V4 - Virtual mode 4. Four mark positions are used for height detection of the substrate, no position correction
 
In addition to position correction mode 1 and 4 also detects substrate height. The virtual modes are only used to detect substrate height since no mark detection is done. Mode S obviously very time consuming for a high number of chips.
 
If set up properly on good quality marks mode 1 or mode 4 chip alignment can usually execute in about 1-2 seconds per mark. The time estimate at compilation will account for the time spend on chip alignment at the current settings of the '''CHIPAL''' subprogram.
 
===Chip alignment JDF ===
In addition to the use of '''CHMPOS''' for chip mark position definition the example below illustrate making arrays of an array. The first array is set up as a 2x2 array assigning array '''A1'''. '''A1''' is defined below as '''1:''', since '''1''' is defined as an array it can be referenced as '''A1'''. '''A''' then defines a 5x5 array assigning pattern '''P(1)''' to each element. The chip mark position command must be used in the same array that assigns the corresponding pattern.


<pre>
<pre>
Line 364: Line 392:


LAYER 1
LAYER 1
         P(1)  'thope230111.v30'
         P(1)  'thope230126.v30'
         SPPRM 4.0,,,,1.0,1
         SPPRM 4.0,,,,1.0,1
         STDCUR  6
         STDCUR  6
Line 370: Line 398:
END
END
</pre>
</pre>
'''CHMPOS [M1=(x1,y1){,M2=(x2,y2),M3=(x3,y3),M4=(x4,y4)}]'''
'''CHMPOS''' defines the chip alignment marks in the local chip coordinate system, unit is µm. M1 is mandatory while M2-M4 are optional in one mark mode. In four mark mode all marks must be defined. The order of the marks is important, M1 must be top left with M2-M4 placed clockwise around the center. In the given example the four marks are placed symmetrically at ±450 µm in x and ±450 µm in y.
It V1 mode it is customary to set M1 = (0,0) such that substrate height is detected at the center of the chip. In this way V1 mode can be used to exactly read out substrate height where the chip pattern will be written.
=Beam current and condition files=
The beam current can in principle be changed in very fine steps, it however requires recalibration of the Dynamic Focus and Dynamic Stigmation table. Hence, only a limited number of beam currents are available. The available beam currents and condition file name are listed below.
{| class="wikitable"
|+  Condition files and beam current
|-
! Beam current [nA] !! Aperture !! Condition file
|-
| 0.12 || 4 || 0.12na_ap4
|-
| 0.16 || 4 || 0.16na_ap4
|-
| 0.22 || 4 || 0.22na_ap4
|-
| 0.4 || 4 || 0.4na_ap4
|-
| 0.5 || 4 || 0.5na_ap4
|-
| 0.8 || 4 || 0.8na_ap4
|-
| 1.4 || 4 || 1.4na_ap4
|-
| 1.6 || 4 || 1.6na_ap4
|-
| 2 || 4 || 2na_ap4
|-
| 2.7 || 4 || 2.7na_ap4
|-
| 3.8 || 5 || 3.8na_ap5
|-
| 4 || 4 || 4na_ap4
|-
| 5 || 5 || 5na_ap5
|-
| 6 || 5 || 6na_ap5
|-
| 10 || 6 || 10na_ap6
|-
| 12 || 5 || 12na_ap5
|-
| 14 || 8 || 14na_ap8
|-
| 19 || 7 || 19na_ap7
|-
| 21 || 7 || 21na_ap7
|-
| 22 || 7 || 22na_ap7
|-
| 25 || 7 || 25na_ap7
|-
| 27 || 7 || 27na_ap7
|-
| 29 || 7 || 29na_ap7
|-
| 30 || 8 || 30na_ap8
|-
| 36 || 8 || 36na_ap8
|-
| 41 || 8 || 41na_ap8
|-
| 44 || 8 || 44na_ap8
|-
| 54 || 7 || 54na_ap7
|-
| 60 || 8 || 60na_ap8
|}
Retrieved from "https://labadviser.nanolab.dtu.dk//index.php?title=Specific_Process_Knowledge/Lithography/EBeamLithography/JEOLJobPreparation"