Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-1: Difference between revisions
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[[Category: Equipment |Etch DRIE]] | [[Category: Equipment |Etch DRIE]] | ||
[[Category: Etch (Dry) Equipment|DRIE]] | [[Category: Etch (Dry) Equipment|DRIE]] | ||
{{contentbydryetch}} | |||
<!--Checked for updates on 28/6-2023 - ok/jmli --> | |||
= DRIE-Pegasus 1= | = DRIE-Pegasus 1= | ||
[[Image:DRIE-Pegasus.jpg |frame|left|x300px|The DRIE-Pegasus 1 load lock and cassette loader in the Nanolab cleanroom A-1]] | [[Image:DRIE-Pegasus.jpg |frame|left|x300px|The DRIE-Pegasus 1 load lock and cassette loader in the Nanolab cleanroom A-1. {{photo1}} ]] | ||
'''The user manual(s), quality control procedure(s) and results, user APV(s), technical information and contact information can be found in LabManager:''' | '''The user manual(s), quality control procedure(s) and results, user APV(s), technical information and contact information can be found in LabManager:''' | ||
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*[[Specific Process Knowledge/Etch/DRIE-Pegasus/Isotropic|Isotropic etches]] | *[[Specific Process Knowledge/Etch/DRIE-Pegasus/Isotropic|Isotropic etches]] | ||
More processes, such as for DUV resist, are currently being developed, but they are not quite 'ready for publication' at LabAdviser so please contact Jonas (mailto:jmli@dtu.dk) for more information. | More processes, such as for DUV resist, are currently being developed, but they are not quite 'ready for publication' at LabAdviser so please contact Jonas ([mailto:jmli@dtu.dk jmli@dtu.dk]) for more information. | ||
<!-- *[[Specific Process Knowledge/Etch/DRIE-Pegasus/slopedsidewalls|Etches that produce positively sloped sidewalls for imprinting purposes]] --> | <!-- *[[Specific Process Knowledge/Etch/DRIE-Pegasus/slopedsidewalls|Etches that produce positively sloped sidewalls for imprinting purposes]] --> | ||
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=== Advanced Processing - Henri Jansen style === | === Advanced Processing - Henri Jansen style === | ||
* [[Specific Process Knowledge/Etch/DRIE-Pegasus/Etch silicon nanostructures|Etch silicon nanostructures ]] | * [[Specific Process Knowledge/Etch/DRIE-Pegasus/Etch silicon nanostructures|Etch silicon nanostructures ]] | ||
* [[Specific Process Knowledge/Etch/DRIE-Pegasus/Etch high aspect ratio silicon microstructures|Etch high aspect ratio silicon microstructures ]] | * [[Specific Process Knowledge/Etch/DRIE-Pegasus/Etch high aspect ratio silicon microstructures|Etch high aspect ratio silicon microstructures ]] | ||
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To find information on how to bond wafers or chips to a carrier wafer, click [[Specific Process Knowledge/Etch/DryEtchProcessing/Bonding| here]]. | To find information on how to bond wafers or chips to a carrier wafer, click [[Specific Process Knowledge/Etch/DryEtchProcessing/Bonding| here]]. | ||
'''Characterisation of etched trenches''' | '''Characterisation of etched trenches''' | ||