Jump to content

Specific Process Knowledge/Etch/Etching of Silicon Oxide: Difference between revisions

Bghe (talk | contribs)
Mbec (talk | contribs)
No edit summary
 
(13 intermediate revisions by 3 users not shown)
Line 1: Line 1:
'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_Silicon_Oxide click here]'''
'''Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.'''
 
'''All links to Kemibrug (SDS) and Labmanager Including APV and QC requires login.'''
 
'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_Silicon_Oxide click here]'''
<!-- Replace "http://labadviser.danchip.dtu.dk/..." with the link to the Labadviser page-->
<!-- Replace "http://labadviser.danchip.dtu.dk/..." with the link to the Labadviser page-->


Line 6: Line 10:


*[[Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF)|Wet Silicon Oxide Etch]]
*[[Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF)|Wet Silicon Oxide Etch]]
*[[Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4|SiO2 etch with DRIE Pegasus 4]]
 
*[[Specific_Process_Knowledge/Etch/III-V_RIE/III_V_RIE_ETCHES#CHF3.2FO2_etch |SiO2 etch using III-V RIE]]
*[[Specific_Process_Knowledge/Etch/III-V_RIE/III_V_RIE_ETCHES#CHF3.2FO2_etch |SiO2 etch using III-V RIE]]
*[[/SiO2 etch using AOE|SiO2 etch using AOE]]
*[[/SiO2 etch using AOE|SiO2 etch using AOE]]
*[[Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4|SiO2 etch with DRIE Pegasus 4]]
*[[/SiO2 etch using ASE|SiO2 etch using ASE]]
*[[Specific_Process_Knowledge/Etch/ICP_Metal_Etcher/silicon_oxide|SiO2 etch using ICP metal]]
*[[Specific_Process_Knowledge/Etch/ICP_Metal_Etcher/silicon_oxide|SiO2 etch using ICP metal]]
*[[/SiO2 etch using ASE|SiO2 etch using ASE]]
*[[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
*[[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
*[[/SiO2 etch using Plasma Asher|SiO2 etch using Plasma Asher (isotropic)]]
*[[/SiO2 etch using Plasma Asher|SiO2 etch using Plasma Asher (isotropic)]]
Line 39: Line 44:
*Isotropic etch
*Isotropic etch
|
|
*Anisotropic etch: vertical sidewalls
*Anisotropic etch: vertical sidewalls.
*Primarily for samples with small amounts of metals on.
|
|
*Anisotropic etch: vertical sidewalls
*Anisotropic etch: vertical sidewalls
*Premarily for III-V samples
*Primarily for III-V samples
|
|
*Anisotropic etch: vertical sidewalls
*Anisotropic etch: vertical sidewalls
Line 49: Line 55:
|
|
*Anisotropic etch: almost vertical sidewalls
*Anisotropic etch: almost vertical sidewalls
*We prefer that SiO2 etch on 6" wafers takes place in the Pegasus 4.
*We prefer that SiO2 etch takes place in the AOE or Pegasus 4.
|
|
*Primarily for pure physical etch by sputtering with Ar-ions
*Primarily for pure physical etch by sputtering with Ar-ions
*Also for slanted gratings
|
|
*Gas phase HF etching with ethanol as carrier
*Gas phase HF etching with ethanol as carrier
Line 102: Line 109:
*Aluminium
*Aluminium
*Chromium
*Chromium
*Ti
|
|
*Any material that is accepted in the machine
*Any material that is accepted in the machine
Line 116: Line 122:
|
|
*~75 nm/min (Thermal oxide) in BHF
*~75 nm/min (Thermal oxide) in BHF
*~90 nm/min (Thermal oxide) in SIO Etch
*~80 nm/min (Thermal oxide) in BOE 7:1 Etchant VLSI with Surfactant
*~25 nm/min (Thermal oxide) in 5%HF
*~25 nm/min (Thermal oxide) in 5%HF
*~6 nm/min (Thermal oxide) in 1%HF
*~3-4µm/min in 40%HF
*~3-4µm/min in 40%HF
|
|
Line 272: Line 279:


<br clear="all" />
<br clear="all" />
==Dry etch with Hard mask==
''By Martin Lind Ommen - ''fall 2016'' '' <br>
Testing selectivities for SiO<sub>2</sub> etching with hard masks on AOE and ICP metal with different recipes.All tests are done with 100% etching load<br>
[[File:Dry etching by Martin Lind Ommen Fall 2016.png|600px]]<br>
MLO_psi is the version of SiO2_psi on labadviser that is shown under low line with reduction.<br>
The recipe ICP is on ICP metal call: A SiO2 etch with C4F8 with resist mask<br>
I had problems with this recipe - it gave polymer on the surface, therefor I do not have more info on that.<br>