Jump to content

Specific Process Knowledge/Etch/Etching of Silicon Nitride: Difference between revisions

← Older edit
VisualWikitext
BGE (talk | contribs)
Bureaucrats, danchip, Administrators
2,908 edits
Bghe (talk | contribs)
DCH-Employees-701, NLAB-Employees-701, NLAB-LabmanagerAllUsers, Bureaucrats, Administrators
7,301 edits
 
(32 intermediate revisions by 8 users not shown)
Line 1: Line 1:
Silicon nitride can be etched using either wet chemistry or dry etch equipment. Wet chemistry is mainly used to remove all the nitride on the surface (backside and frontside) of a wafer. Dry etching etches one side at a time and can be used to etch structures with several masking materials.
'''Unless anything else is stated, everything on this page, text and pictures are made by DTU Nanolab.'''


'''All links to Kemibrug (SDS) and Labmanager Including APV and QC requires login.'''


 
'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_Silicon_Nitride click here]'''
 
=This Part is under construction=
 
'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/Etching_of_Silicon_Nitride click here]'''
<!-- Replace "http://labadviser.danchip.dtu.dk/..." with the link to the Labadviser page-->
<!-- Replace "http://labadviser.danchip.dtu.dk/..." with the link to the Labadviser page-->


== Comparing silicon nitride etch methods at Danchip [[Image:section under construction.jpg|70px]]==
== Comparing silicon nitride etch methods at DTU Nanolab ==


There are a broad varity of silicon nitride etch methods at Danchip. The methodes are compared here to make it easier for you to compare and choose the one that suits your needs.  
There are a broad variety of silicon nitride etch methods at DTU Nanolab. The methods are compared here to make it easier for you to compare and choose the one that suits your needs.  




*[[Specific Process Knowledge/Etch/Wet Silicon Nitride Etch|Wet Silicon Nitride Etch]]
*[[Specific Process Knowledge/Etch/Wet Silicon Nitride Etch|Wet Silicon Nitride Etch]]
*[[/Etch of Silicon Nitride using RIE|Etch of Silicon Nitride using RIE]]
*[[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)/Silicon Nitride Etch using AOE|Etch of Silicon Nitride using AOE]]
*[[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)/Silicon Nitride Etch using AOE|Etch of Silicon Nitride using AOE]]
*[[Specific Process Knowledge/Etch/IBE/IBSD Ionfab 300|IBE/Ion Beam Etching using IBSD Ionfab 300]]
*[[Specific_Process_Knowledge/Etch/Etching_of_Silicon_Oxide/SiO2_etch_using_ASE|Nitride etch using ASE]]
*[[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/Ion Beam Etching using IBSD Ionfab 300]]


*[[Specific_Process_Knowledge/Etch/ICP_Metal_Etcher/silicon_nitride|Silicon nitride etch using the ICP metal]]


==Compare the methods for Silicon Nitride etching==
==Compare the methods for Silicon Nitride etching==
Line 30: Line 28:
![[Specific Process Knowledge/Etch/Wet Silicon Nitride Etch|Wet Silicon Nitride Etch]]
![[Specific Process Knowledge/Etch/Wet Silicon Nitride Etch|Wet Silicon Nitride Etch]]
![[Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF)|BHF]]
![[Specific Process Knowledge/Etch/Wet Silicon Oxide Etch (BHF)|BHF]]
![[Specific Process Knowledge/Etch/RIE (Reactive Ion Etch)|RIE (Reactive Ion Etch)]]
![[Specific_Process_Knowledge/Etch/DRIE-Pegasus/Pegasus-4|Pegasus 4]]
![[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)|AOE (Advanced Oxide Etch)]]
![[Specific Process Knowledge/Etch/AOE (Advanced Oxide Etch)|AOE (Advanced Oxide Etch)]]
![[Specific Process Knowledge/Etch/ASE_(Advanced_Silicon_Etch)|ASE]]
![[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
![[Specific Process Knowledge/Etch/IBE&frasl;IBSD Ionfab 300|IBE/IBSD Ionfab 300]]
![[Specific Process Knowledge/Etch/ICP Metal Etcher|ICP Metal]]


|-
|-
Line 41: Line 42:
|
|
*Isotropic etch
*Isotropic etch
*Well suited for removing all nitride on a wafer surface (nitride strip) without a mask. High selectivity Si<sub>3</sub>N<sub>4</sub>/Si (>100) and Si<sub>3</sub>N<sub>4</sub>/SiO<sub>2</sub> (>20) @ 180 C.
*Well suited for removing all nitride on a wafer surface (nitride strip) without a mask. High selectivity Si<sub>3</sub>N<sub>4</sub>/Si (>100) and Si<sub>3</sub>N<sub>4</sub>/SiO<sub>2</sub> (>20) @ 160 C.
|
|
*Isotropic etch
*Isotropic etch
*Well suited for removing all  PECVD nitride on a wafer surface (nitride strip) without a mask. Etches LPCVD nitride very slowly
*Well suited for removing all  PECVD nitride on a wafer surface (nitride strip) without a mask. Etches LPCVD nitride very slowly
|
* Anisotropic etch: vertical sidewalls
* With cassette loader for batch processing.
|
|
*Anisotropic etch: vertical sidewalls
*Anisotropic etch: vertical sidewalls
*Deep etch
|
|
*Anisotropic etch: vertical sidewalls
*Anisotropic etch: vertical sidewalls
*Deep etch
*Primarily for samples with small amounts of metal
|
|
*Primarily for pure physical etch by sputtering with Ar-ions
*Primarily for pure physical etch by sputtering with Ar-ions
|
*Anisotropic etch: vertical sidewalls
*Primarily for Cl/Br etch chemistry.
*F-chemistry, please use AOE or Pegasus 4.
|-
|-


Line 71: Line 81:
*Silicon Nitride
*Silicon Nitride
*Aluminium
*Aluminium
*Metals if they cover less than 5% of the wafer area (ONLY RIE2!)
*Chromium (if needed)
|
*Photoresist
*DUV resist
*E-beam resist
*Silicon Oxide
*Silicon Nitride
*Aluminium
*Chromium (if needed)
|
|
*Photoresist
*Photoresist
Line 79: Line 97:
*Silicon Nitride
*Silicon Nitride
*Aluminium
*Aluminium
*Chromium (please try to avoid it)
*Metals if they cover less than 5% of the wafer area
|
|
*Any material that is accepted in the machine
*Any material that is accepted in the machine
|
*Resists
*other materials from the allowed list of materials
|-
|-


Line 88: Line 109:
!Etch rate range
!Etch rate range
|
|
*Si<sub>3</sub>N<sub>4</sub> @ 180 <sup>o</sup>C: ~84 Å/min
*Si<sub>3</sub>N<sub>4</sub> @ 160 <sup>o</sup>C: ~26 Å/min
*Si<sub>3</sub>N<sub>4</sub> @ 160 <sup>o</sup>C: ~60 Å/min
|
|
*PECVD nitride: ~400-1000 Å/min
*PECVD nitride: ~40.0-100.0 nm/min
*Stoichiometric LPCVD nitride: ~0.65-8 nm/min <!-- Copyrigth issues kabi (''Yannick Seis, KU, 2019'')-->
|
*Process dependent.
*From 0 to ~300 nm/min
|
|
*Typically 40-50 nm/min can be increased or decreased by using other recipe parameters.
*Process dependent.
*from 0 to ~500 nm/min
|
|
*Process dependent.
*Probably between 20-300 nm/min depending on the process parameters
*Tested once to ~60nm/min
|
|
*Process dependent.
*Process dependent.
*Has not been tested yet.
*Has not been tested yet.
|
*Process dependent
*60-65 nm/min has been tested
|-
|-


Line 106: Line 133:
!Substrate size
!Substrate size
|
|
*<nowiki>#</nowiki>1-25 100 mm wafers  
*<nowiki>#</nowiki>1-25 4" and 6" wafers  
|
|
*<nowiki>#</nowiki>1-25 100mm wafers in our 100mm bath
*<nowiki>#</nowiki>1-25 4"-6" wafers  
|
|
*As many small samples as can be fitted on the 100mm carrier.
*As many small samples as can be bonded on a 150mm wafer
*<nowiki>#</nowiki>1 100mm wafer (or smaller with carrier)
*50 mm wafers if bonded on a 150mm wafer
*<nowiki>#</nowiki>1 150mm wafer (only when the system is set up for 150mm)
*<nowiki>#</nowiki>1 100 mm wafer if bonded on a 150 mm wafer
*#1 150 mm wafer
|
|
*As many small samples as can be fitted on a 100mm wafer
*As many small samples as can be fitted on a 100mm wafer
*<nowiki>#</nowiki>1 50 mm wafer fitted on a 100mm wafer
*<nowiki>#</nowiki>1 50 mm wafer fitted on a 100mm wafer
*<nowiki>#</nowiki>1 100 mm wafer
*<nowiki>#</nowiki>1 100 mm wafer
*<nowiki>#</nowiki>1 150 mm wafers (only RIE2 when set up to 150mm)
|
*As many small samples as can be fitted on the 100mm carrier (bad/no cooling!)
*<nowiki>#</nowiki>1 100mm wafer (or smaller with carrier)
*<nowiki>#</nowiki>1 150mm wafer (only when the system is set up for 150mm)  
|
|
*As many samples as can be securely fitted on a up to 200mm wafer
*As many samples as can be securely fitted on a up to 200mm wafer
Line 124: Line 155:
*<nowiki>#</nowiki>1 150 mm wafers with special carrier
*<nowiki>#</nowiki>1 150 mm wafers with special carrier
*<nowiki>#</nowiki>1 200 mm wafer
*<nowiki>#</nowiki>1 200 mm wafer
|
*Set up for 150mm wafers
*Smaller samples can be processes when fixed to a 150mm carrier wafer.
|-
|-
|-style="background:WhiteSmoke; color:black"
|-style="background:WhiteSmoke; color:black"
Line 147: Line 181:
*E-beam resists
*E-beam resists
*DUV resists
*DUV resists
*Other metals if they cover less than 5% of the wafer area (ONLY RIE2!)
*Aluminium (only for masking
*Chromium (only for masking and on the back side if fused silica)
*Quartz/fused silica
*Quartz/fused silica
|
|
Line 158: Line 193:
*DUV resists
*DUV resists
*Aluminium
*Aluminium
*Chromium (try to avoid it)
*Chromium (only for masking and on the back side if fused silica)
*Quartz/fused silica
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*E-beam resists
*DUV resists
*Other metals if they cover less than 5% of the wafer area
*Quartz/fused silica
*Quartz/fused silica
|
|
Line 173: Line 218:
*Polymers
*Polymers
*Capton tape
*Capton tape
|
*Silicon
*Silicon Oxide
*Silicon Nitride
*Silicon Oxynitride
*Photoresist
*E-beam resists
*DUV resists
*Aluminium (Al, Al2O3, AlN)
*Chromium
*Titanium (Ti, TiW, TiN, TiO2)
*Tungsten (W)
*Molybdynem
*Quartz/fused silica
|-
|-
|}
|}


<br clear="all" />
<br clear="all" />
Retrieved from "https://labadviser.nanolab.dtu.dk//index.php?title=Specific_Process_Knowledge/Etch/Etching_of_Silicon_Nitride"