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Specific Process Knowledge/Etch/ICP Metal Etcher/Chromium: Difference between revisions

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<br> {{CC-bghe1}}


==Chromium etch in ICP metal - small substrate using carrier==
==Chromium etch in ICP metal - small substrate using carrier==
The Chromium etch was carried out on the following substrate stack:
The Chromium etch was carried out on the following substrate stack:
2" Si wafer with Cr laying in a 6" Si wafer with a 4" recess. The area outside the recess was covered by AZ resist.
2" Si wafer with Cr laying in a 6" Si wafer with a 4" recess. The area outside the recess was covered by AZ resist.
The work was carried out be Erol Zekovic @Nanotech and BGHE@nanolab
The work was carried out by Erol Zekovic @Nanotech and BGHE@nanolab
* [[/End point|Cr etch  - when to stop using end point detecting]]
 
{| border="2" cellpadding="2" cellspacing="1" style="text-align:center;"
{| border="2" cellpadding="2" cellspacing="1" style="text-align:center;"
|+ '''Cr etch'''
|+ '''Cr etch'''
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| Was masked by capton tape
| Was masked by capton tape
|}
|}
<gallery caption="Etching lines in 100nm Cr with the Cr etch for 3:30 min with 500 nm DUV resist on a 22mmx22mm piece ''BGHE@Nanolab Jan 2023''" perrow="5" widths="400px" heights="300px">
File:s040321_02.jpg
File:s040321_05.jpg
File:s040321_08.jpg
File:s040321_11.jpg
File:s040321_12.jpg
File:s040321_14.jpg
</gallery>


<gallery caption="Etching lines in 100nm Cr with the Cr etch for 3 min with 300 nm DUV resist ''BGHE@Nanolab Feb 2022''" perrow="5" widths="400px" heights="300px">
<gallery caption="Etching lines in 100nm Cr with the Cr etch for 3 min with 300 nm DUV resist ''BGHE@Nanolab Feb 2022''" perrow="5" widths="400px" heights="300px">
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</gallery>
</gallery>


<gallery caption="Etching lines in 100nm Cr with the Cr etch for 3:20 min with pressure of 30 mTorr and 20C with 300 nm DUV resist ''BGHE@Nanolab Oct 2022''" perrow="5" widths="400px" heights="300px">
Image:S03385207.jpg
Image:S03385211.jpg
Image:S03385213.jpg
Image:S03385204.jpg
Image:S03385215.jpg
</gallery>




<br>
<br>


==Chromium etch of hardmask for silicon nitride etching by Anders Simonsen@nbi.ku [[Image:section under construction.jpg|70px]]==  
==Chromium etch of hardmask for silicon nitride etching by Anders Simonsen@nbi.ku ==  
''Added by bghe@Nanolab'' <br>
'''This work was done by Anders Simonsen, KU''' and ''Added by bghe@Nanolab'' <br>
Anders has done some work on optimizing the Cr etch for at 20-40 nm thick Cr that was to be used as masking for a silicon nitride etch. The Cr etch was carriered out on the ICP metal and the silicon nitride etch was done on the AOE. You can see his results in this summery that he has made:
Anders has done some work on optimizing the Cr etch for at 30 nm thick Cr that was to be used as masking for a 200nm silicon nitride etch. The Cr etch was carriered out on the ICP metal using 180 nm CSAR and the silicon nitride etch was done on the AOE. You can see his results in this summery that he has made:
* [[:File:report_summer2022 Anders Simonsen bghe edits.pdf | Cr etch development report summery by Anders Simonesen, summer of 2022 ]]
* [[Media:report_summer2022 Anders Simonsen bghe edits.pdf | Cr etch development report summery by Anders Simonesen, summer of 2022 ]]
* [[/Cr etch data from AS |Here are the raw test data and SEM images from Anders Simonsen]]
* [[/Cr etch data from AS |Here are the raw test data and SEM images from Anders Simonsen]]


'''Preferer result:'''
'''Prefered result:'''


The SEM images where done after both the Cr etch and the silicon nitride etch in the AOE using the recipe "?". The important thing was to see how well the Cr works for masking the nitride given vertical and smooth sidewalls in the nitride.  
The SEM images where done after both the Cr etch and the silicon nitride etch in the AOE using the recipe "SiN_AS". The important thing was to see how well the Cr works for masking the nitride given vertical and smooth sidewalls in the nitride. The thickness of the Cr was 40 nm 


{| class="wikitable"
{| class="wikitable"
! Recipe !! Pressure [mTorr] !! Coil power [W] !! Platen power [W] !! Total Flow Cl2+O2 [sccm] !! O2% !! Temp !!  !! Time [s] !! CSAR etch rate [nm/min] !! CSAR rate w bond !!  !! Etch rate [nm/min] !! Selectivity !!  !! coil load !! coil tune !! plat load !! plat tune !! Comment
! Recipe !! Pressure [mTorr] !! Coil power [W] !! Platen power [W] !! Total Flow Cl2+O2 [sccm] !! O2% !! Temp !!  !! Time [s] !! CSAR etch rate [nm/min] !! CSAR rate w bond !!  !! Etch rate [nm/min] !! Selectivity !!  !! coil load !! coil tune !! plat load !! plat tune !! Comment
|-
|-
! test13/laqs
! Cr_AS_13
| 10 || 300 || 15 || 30 || 23.33 || 20 ||  || 28 || 100.71 ||  ||  || 42.86 || 0.43 ||  ||  ||  ||  ||  || This recipe was chosen over no. 12 because it did not need a large over etch of the Cr (no foot).
| 10 || 300 || 15 || 30 || 23.33 || 20 ||  || 28 || 100.71 ||  ||  || 42.86 || 0.43 ||  ||  ||  ||  ||  || This recipe was chosen over no. 12 because it did not need a large over etch of the Cr (no foot).
|-
|-
|}
|}


<gallery caption="After Cr etch 75s with recipe 13 and nitride etch in the AOE 20s" widths="400px" heights="300px" perrow="2">
<gallery caption="After Cr etch with recipe 13 and nitride etch in the AOE 20s" widths="400px" heights="300px" perrow="2">
 
Image:Cr-75s_sin-met-20s_0733.jpg| 75s Cr etch
Image:Cr-90s_sin-met-20s_0757.jpg| 90s Cr etch
 
</gallery>
 
=== Recipe tried out on DUV pattern with 100 nm Cr and approx. 300 nm DUV resist===
''by bghe@nanolab 2022-09-29''
* A piece of approx 2cmx2cm was bonded to a Si/SiO2 wafer
*1 min O2 barc etch was done
*3min20s of CR_AS_13
====Results====
*Clearly too little resist for this etch
 
<gallery caption="After Cr etch with recipe Cr_AS_13 for 3min20s" widths="300px" heights="225px" perrow="4">


Image:Cr-75s_sin-met-20s_0733.jpg
Image:S0338_51_05.jpg
Image:S0338_51_06.jpg
Image:S0338_51_01.jpg
Image:S0338_51_03.jpg
Image:S0338_51_04.jpg
Image:S0338_51_00.jpg
Image:S0338_51_07.jpg


</gallery>
</gallery>