Specific Process Knowledge/Etch/DRIE-Pegasus/Pegasus-4/SiO2 Etch

SiO2 Etch using resist as masking material

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab
I have do some development of a SiO2 etch with resist as masking material. I have found this fairly good recipe. For now it is the standard SiO2 etch recipes but I might change the "Standard recipe" a a later time if I find a better one. If you need to etch deeper than 1 micrometer then I advise you to split the etch in several runs with O2 cleans in between (3min TDESC Clean) or else it seems like the the etch rate is going down over time.

• Click here for more results on the process development on SiO2 etch with DUV resist mask

• Recipe name: SiO2_res_10, Recipe no. 10: C06445_02 coil_2500W, platen:300W, He/C4F8= 17.5, C4F8/H2=1, Pressure:8.8mTorr, C4F8:25.6sccm, He:448.7sccm, H2:25.6sccm, 3:56 min
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  0.4µ/0.2µ
  Bad lithography

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  0.5/0.25µ
  Etch depth: 652 nm
  Resist left: 456 nm

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  1µ/0.5µ:
  Etch depth: 855 nm
  Resist left: 487 nm

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  2µ/1µ:
  Etch depth: 952 nm
  Resist left: 487 nm

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  4µ/2µ:
  Etch depth: 1106 nm
  Resist left: 487 nm

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  0.8µ/0.2µ
  Etch depth: 867 nm
  Resist left: 426 nm

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  1.0µ/0.25µ:
  Etch depth: 893 nm
  Resist left: 460 nm

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  4µ/1µ:
  Etch depth: 1033 nm
  Resist left: 473 nm

Uniformity results with SiO2_res_10

Etched for 3min56s, average etch rate: 250 nm/min +- 2.9%

Results with SiO2_res_10 and EM

Etched with EM:02/30 for 2min, average etch rate: 275 nm/min +- 4.5%. The electro magnets changed the uniformity pattern and made it a bit worse

• Recipe name: SiO2_res_10, Recipe no. 10+EM coils: C06445_02 coil_2500W, platen:300W, EM:02/30A, He/C4F8= 17.5, C4F8/H2=1, Pressure:8.8mTorr, C4F8:25.6sccm, He:448.7sccm, H2:25.6sccm, 3:56 min
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Using the electromagnetic coil on the recipe SiO2_res_10 gave higher etch rate on this chip that was placed in the center of a 6" wafer. The Etch profile is more angles.

• I few more test with resist mask and electromagnets can be found here: EM with resist mask

SiO2 Etch using aSi as masking material

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab
I was starting up development of SiO2 etch using aSi as masking material. This is on pause because the results did not look promishing on high aspect ratio structures wit DUV pattern due to large faceting on the aSi mask. I turned to Cr mask instead
The samples I use are:

• 6" Si afters with oxide (2µm),
• aSi (~300nm),
• Neg. DUV reist (~60nm barc, ~350 nm resist)
• Reticle: Danchip/Triple-D
• Dose 230 J/m2

First I need to make sure that the resist work for pattering the aSi layer is good. If the resist is not good the final etch will also not be good.

DUV optimization

Dose test with the doses (J/m2): 200, 210, 220, 230, 240, 250, 270, 280 The aim was to get good line for 400nm pitch/200nm lines

• 400nm pitch 200 nm lines
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  200 J/m2 400nm/268nm

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  210 J/m2 400nm/239nm

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  220 J/m2 400nm/208nm

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  230 J/m2 400nm/209nm

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  240 J/m2 400nm/215nm

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  250 J/m2 400nm/207nm

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  260 J/m2 400nm/188nm

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  270 J/m2 400nm/155nm

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  280 J/m2 400nm/0nm

• 1000nm pitch 500 nm lines
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  210 J/m2 1000nm/581nm

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  230 J/m2 1000nm/517nm

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  240 J/m2 1000nm/518nm

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  250 J/m2 1000nm/510nm

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  260 J/m2 1000nm/493nm

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  270 J/m2 1000nm/494nm

SiO2 etch with Cr mask

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab

• More tests with Cr mask

SiO2 etch with Cr mask 100 nm and with 500 nm for the resist for the Cr etch

Barc etch and Cr etch were done in ICP metal using end point detection. The sample was a full 6" wafer

• SiO2_res_10 2x5:00 min with 3 min TDESC clean in between 100 nm Cr mask, with 500 nm resist
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• SiO2_res_10 5:00 min 100 nm Cr mask, with 500 nm resist, resist/Cr stripped after etch in plasma asher 35min
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  200nm/400nm

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  250nm/500nm

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  400nm/800nm

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  500nm/1000nm

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  1000nm/2000nm

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  2000nm/4000nm

Testing with electromagnetic coils /Cr mask

Unless otherwise stated, all content in this section was done by Berit Herstrøm, DTU Nanolab

When testing with decreased platen power on the SiO2_10 standard recipe the uniformity got very bad. I then tested with the electromagnetics coil to see if that could affect the uniformity. There is an outer coil that can be varied between 0 A and 10 A and an inner coil that can be varied between 0 A and 30 A. The first tests were done on Si/SiO2(1µm) without pattern and measured on the ellipsometer.

Parameter	Recipe name: no 10 with lower platen power
Coil Power [W]	2500
Platen Power [W]	200
Platen temperature [oC]	20
H2 flow [sccm]	25.6
C4F8 flow [sccm]	25.6
He flow [sccm]	448.7
Pressure	Fully open APC valve (8-9 mTorr)
Electromagnetic coils (EM) 'outer coil' / 'inner coil'	'0-10 A' / '0-30 A'

• EM tests
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  Etch time: 2 min, Average etch rate: 100.2 nm/min, range:+-55.1%

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  Etch time: 2 min, Average etch rate: 100.5 nm/min, range:+-32.6%

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  Etch time: 2 min, Average etch rate: 100.8 nm/min, range:+-50.8%

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  Etch time: 2 min, Average etch rate: 203.8 nm/min, range:+-6.1%

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  Etch time: 2 min, Average etch rate: 186.2 nm/min, range:+-3.2%

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  Etch time: 6 min on patterned wafer with different measurement points, <100 nm Cr mask is still on, EM_2/30, Average etch rate: 207-223 nm/min depending on how much Cr mask is left, range:+-2.3%

• EM tests with Cr mask on full wafer 6 min etch
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