Specific Process Knowledge/Etch/III-V ICP/InP-InGaAsP-InGaAs: Difference between revisions
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'''Feedback to this page''': '''[mailto:labadviser@ | '''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/III-V_ICP/InP-InGaAsP-InGaAs click here]''' | ||
<!-- Page reviewed 9/8-2022 jmli --> | |||
Work done by Aurimas Sakanas @Fotonik.dtu 2019 | |||
== InP etch with HBr chemistry (2019)== | |||
Work done by Aurimas Sakanas @Fotonik.dtu 2019. This work was done to obtain very low surface roughness. | |||
{| border="1" cellspacing="2" cellpadding="3" | {| border="1" cellspacing="2" cellpadding="3" | ||
|'''Recipe''' | |'''Recipe name''' | ||
|'''?''' | |'''?''' | ||
|- | |- | ||
Line 31: | Line 35: | ||
|Sample crystal bonded (Crystalbond 509, clear color) to Si carrier | |Sample crystal bonded (Crystalbond 509, clear color) to Si carrier | ||
|} | |} | ||
{| border="1" cellspacing="2" cellpadding="3" align="left" | {| border="1" cellspacing="2" cellpadding="3" align="left" | ||
Line 43: | Line 46: | ||
|Sidewall angle | |Sidewall angle | ||
| | | | ||
85-87 <sup>o</sup> (bottom)<br> | 85-87<sup>o</sup> (bottom)<br> | ||
93-95 <sup>o</sup> (top)<br> | 93-95<sup>o</sup> (top)<br> | ||
Concave profile | Concave profile | ||
|- | |- | ||
|Selectivity (InP:HSQ) | |Selectivity (InP:HSQ) | ||
|15:1 (2"), 20:1 | |15:1 (2"), 20:1 | ||
|- | |||
|Other tests | |||
|Comparing this recipe with the Cl2/H2 recipe, click here: [[Media:HBr vs Cl2 InP etch comparison Aurimas.pptx]] ''(By Aurimas Sakana @photonic (nov 2019)) | |||
|- | |- | ||
|} | |} | ||
<gallery widths="200px" heights=" | <gallery widths="200px" heights="150px" perrow="2"> | ||
Image:Picture1.jpg|200 nm wide line structure, t<sub>etch</sub>=25 s | Image:Picture1.jpg|200 nm wide line structure, t<sub>etch</sub>=25 s | ||
Image:Picture2.jpg| | Image:Picture2.jpg|700 nm wide line structure, t<sub>etch</sub>=25 s <br> | ||
</gallery> | </gallery> | ||
<gallery widths="200px" heights=" | <gallery widths="200px" heights="150px" perrow="3"> | ||
Image:Picture4.jpg|200 nm wide line structure, t<sub>etch</sub>=2 min | Image:Picture4.jpg|200 nm wide line structure, t<sub>etch</sub>=2 min | ||
Image:Picture5.jpg|400 nm wide line structure, t<sub>etch</sub>=2 min | Image:Picture5.jpg|400 nm wide line structure, t<sub>etch</sub>=2 min | ||
Image:Picture6.jpg|1 µm wide line structure, t<sub>etch</sub>=2 min <br> | Image:Picture6.jpg|1 µm wide line structure, t<sub>etch</sub>=2 min <br> | ||
</gallery> | </gallery> | ||
<gallery widths="200px" heights=" | <gallery widths="200px" heights="150px" perrow="4"> | ||
Image:Picture3.jpg|Two 1 µm wide line structure, 300 nm gap, t<sub>etch</sub>=25 s | Image:Picture3.jpg|Two 1 µm wide line structure, 300 nm gap, t<sub>etch</sub>=25 s | ||
Image:Picture7.jpg|Two 1 µm wide line structure, 300 nm gap, t<sub>etch</sub>=2 min | Image:Picture7.jpg|Two 1 µm wide line structure, 300 nm gap, t<sub>etch</sub>=2 min | ||
Line 70: | Line 76: | ||
</gallery> | </gallery> | ||
=== InP etch with Cl2/CH4/Ar 2013 | == InP etch with Cl2/H2 and a Si carrier wafer (2019) == | ||
''Work done by Berit Herstrøm @Nanolab spring 2019'' | |||
<br> | |||
This work was done with great inspiration from the following articles: | |||
*'''Sidewall passivation assisted by a silicon coverplate during and HBr inductively coupled plasma etching of InP for photonic devices''' ''by S. Bouchoule, G. Patriarche, S. Guilet, L. Gatilova, L. Largeau, and P. Chabert'', Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 26, 666 (2008); doi: 10.1116/1.2898455 | |||
*'''Optimization of a inductively coupled plasma etching process adapted to nonthermalized InP wafers for the realization of deep ridge heterostructures''', ''by S. Guilet, S. Bouchoule, C. Jany, C. S. Corr, and P. Chabert'', Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 24, 2381 (2006); doi: 10.1116/1.2348728 | |||
*'''Investigation of InP etching mechanisms in a inductively coupled plasma by optical emission spectroscopy''', ''by L. Gatilova, S. Bouchoule, S. Guilet, and P. Chabert'', Journal of Vacuum Science & Technology A 27, 262 (2009); doi: 10.1116/1.3071950 | |||
{| border="1" cellspacing="2" cellpadding="3" | |||
|'''Recipe name''' | |||
|'''?''' | |||
|- | |||
|Cl2 flow | |||
|6.6 sccm | |||
|- | |||
|H<sub>2</sub> flow | |||
|5.4 sccm | |||
|- | |||
|Process time | |||
|6 min | |||
|- | |||
|Platen power | |||
|150 W | |||
|- | |||
|Coil power | |||
|800 W | |||
|- | |||
|Pressure | |||
|0.5 mTorr (strike pressure 10s@10mTorr) | |||
|- | |||
|Platen chiller temperature | |||
|180 <sup>o</sup>C | |||
|- | |||
|Comment | |||
|Sample placed on a Si carrier | |||
|- | |||
|} | |||
{| border="1" cellspacing="2" cellpadding="3" align="left" | |||
|colspan="2" align="center"| '''Results''' | |||
|- | |||
|Etch rate | |||
| | |||
925 nm/min (small piece) | |||
|- | |||
|Sidewall angle | |||
| | |||
90<sup>o</sup> (on this sample)<br> | |||
If you get a small tapered profile try lowering the platen power (to e.g. 100W), this will also decrease the etch rate | |||
|- | |||
|Selectivity (InP:SiO2 (PECVD 500nm) | |||
| approx.17:1 | |||
|- | |||
|- | |||
|Other tests made | |||
| | |||
*Comparing of this Cl2/H2 recipe with HBr recipe on e-beamed structures:[[Media:HBr vs Cl2 InP etch comparison Aurimas.pptx]] ''(By Aurimas Sakana @photonic (nov 2019)) | |||
'' | |||
*A few parameter variations on the recipe, [[/InP etch with Cl2-H2-Ar| see results on this page!]] | |||
|- | |||
|} | |||
<gallery widths="200px" heights="150px" perrow="3"> | |||
Image:s12 800W 6min profile angle.JPG | |||
Image:s12 800W 6 min T20dg01.jpg | |||
Image:s12 800W 6min profile06.jpg | |||
</gallery> | |||
== InP etch with Cl2/CH4/Ar 2013== | |||
Work done by Matthew Haines in 2013 <br> | Work done by Matthew Haines in 2013 <br> | ||
*[[Media:InP_Etch_Presentation_Final_Version-ky-bghe.pdf|InP Etch Presentation by Matthew Haines]] | *[[Media:InP_Etch_Presentation_Final_Version-ky-bghe.pdf|InP Etch Presentation by Matthew Haines]] | ||
== InP/InGaAsP/InGaAs etch 2011 == | |||
Unselective etch for large sized features and small aspect ratios by David Larsson, DTU Photonics, 2011 | Unselective etch for large sized features and small aspect ratios by David Larsson, DTU Photonics, 2011 | ||
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|'''Recipe''' | |'''Recipe''' | ||
|'''InP Etch 1/InP Precond 1''' | |'''InP Etch 1/InP Precond 1''' | ||
|? | |||
|- | |- | ||
|Cl<sub>2</sub> flow | |Cl<sub>2</sub> flow | ||
|20 sccm | |20 sccm | ||
|11 sccm | |||
|- | |- | ||
|N<sub>2</sub> flow | |N<sub>2</sub> flow | ||
|40 sccm | |40 sccm | ||
|20 sccm | |||
|- | |- | ||
|Ar flow | |Ar flow | ||
|10 sccm | |10 sccm | ||
|24 sccm | |||
|- | |- | ||
|Platen power | |Platen power | ||
|100 W | |100 W | ||
|120 W | |||
|- | |- | ||
|Coil power | |Coil power | ||
|500 W | |500 W | ||
|400 W | |||
|- | |- | ||
|Pressure | |Pressure | ||
|2 mTorr | |||
|2 mTorr | |2 mTorr | ||
|- | |- | ||
|Platen chiller temperature | |Platen chiller temperature | ||
|180 <sup>o</sup>C | |||
|180 <sup>o</sup>C | |180 <sup>o</sup>C | ||
|- | |- | ||
|Comment | |Comment | ||
|Use SiO2 carrier (not Si) ''(Kabi/Bghe June 2018)'' | |This is for large structures with samll aspect ratio <br> Use SiO2 carrier (not Si) ''(Kabi/Bghe June 2018)'' | ||
|This is for high aspect ratio | |||
|} | |} | ||
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==InP etching June 2018== | ==InP etching June 2018== | ||
''Done by Kabi and Bghe @ | ''Done by Kabi and Bghe @nanolab'' | ||
===Sample pattern before etching=== | ===Sample pattern before etching=== | ||
Line 178: | Line 266: | ||
Image:S4_06.jpg|Sample S4: Profile view. The recipe InP etch has been used. <br> The sample has been run on a SiO2 carrier wafer. <br> There is not much CD change compared to the oxide mask before the etch. <br> It seems like the SiO2 mask is gone and the sidewall angle from the mask has been transferred into the sample. <br> The sidewall profile is quit vertical in the lower part. <br> Etch time 15 min <br> Etch depth in large open areas: 9.19µm | Image:S4_06.jpg|Sample S4: Profile view. The recipe InP etch has been used. <br> The sample has been run on a SiO2 carrier wafer. <br> There is not much CD change compared to the oxide mask before the etch. <br> It seems like the SiO2 mask is gone and the sidewall angle from the mask has been transferred into the sample. <br> The sidewall profile is quit vertical in the lower part. <br> Etch time 15 min <br> Etch depth in large open areas: 9.19µm | ||
Image:S5_05.jpg|Sample S5: Profile view. The recipe InP etch has been used but with modified Cl2 and N2 flows: N2=30 sccm Cl2=30 sccm. <br> The sample has been run on a SiO2 carrier wafer. <br> There is not much CD change compared to the oxide mask before the etch. <br> It seems like the SiO2 mask is gone. <br> The sidewall profile is overcutting probably due to too little passivation. <br> Etch time 10 min <br> Etch depth in large open areas: 11.82µm | Image:S5_05.jpg|Sample S5: Profile view. The recipe InP etch has been used but with modified Cl2 and N2 flows: N2=30 sccm Cl2=30 sccm. <br> The sample has been run on a SiO2 carrier wafer. <br> There is not much CD change compared to the oxide mask before the etch. <br> It seems like the SiO2 mask is gone. <br> The sidewall profile is overcutting probably due to too little passivation. <br> Etch time 10 min <br> Etch depth in large open areas: 11.82µm | ||
Image:S4_30dg_2_05.jpg|Sample S4: The sidewall roughness on the sample S4 is | Image:S4_30dg_2_05.jpg|Sample S4: The sidewall roughness on the sample S4 is quite high | ||
Image:S5_30dg_01.jpg|Sample S5: The sidewall roughness on the sample S5 is | Image:S5_30dg_01.jpg|Sample S5: The sidewall roughness on the sample S5 is quite low. | ||
</gallery> | </gallery> |
Latest revision as of 13:49, 30 May 2023
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InP etch with HBr chemistry (2019)
Work done by Aurimas Sakanas @Fotonik.dtu 2019. This work was done to obtain very low surface roughness.
Recipe name | ? |
HBr flow | 10 sccm |
CH4 flow | 5 sccm |
Ar flow | 2 sccm |
Platen power | 50 W |
Coil power | 600 W |
Pressure | 5 mTorr |
Platen chiller temperature | 180 oC |
Comment | Sample crystal bonded (Crystalbond 509, clear color) to Si carrier |
Results | |
Etch rate |
250-350 nm/min (2" wafer) |
Sidewall angle |
85-87o (bottom) |
Selectivity (InP:HSQ) | 15:1 (2"), 20:1 |
Other tests | Comparing this recipe with the Cl2/H2 recipe, click here: Media:HBr vs Cl2 InP etch comparison Aurimas.pptx (By Aurimas Sakana @photonic (nov 2019)) |
-
200 nm wide line structure, tetch=25 s
-
700 nm wide line structure, tetch=25 s
-
200 nm wide line structure, tetch=2 min
-
400 nm wide line structure, tetch=2 min
-
1 µm wide line structure, tetch=2 min
-
Two 1 µm wide line structure, 300 nm gap, tetch=25 s
-
Two 1 µm wide line structure, 300 nm gap, tetch=2 min
-
Two 1 µm wide line structure, 500 nm gap, tetch=2 min
-
Two 1 µm wide line structure, 1 µm gap, tetch=2 min
InP etch with Cl2/H2 and a Si carrier wafer (2019)
Work done by Berit Herstrøm @Nanolab spring 2019
This work was done with great inspiration from the following articles:
- Sidewall passivation assisted by a silicon coverplate during and HBr inductively coupled plasma etching of InP for photonic devices by S. Bouchoule, G. Patriarche, S. Guilet, L. Gatilova, L. Largeau, and P. Chabert, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 26, 666 (2008); doi: 10.1116/1.2898455
- Optimization of a inductively coupled plasma etching process adapted to nonthermalized InP wafers for the realization of deep ridge heterostructures, by S. Guilet, S. Bouchoule, C. Jany, C. S. Corr, and P. Chabert, Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 24, 2381 (2006); doi: 10.1116/1.2348728
- Investigation of InP etching mechanisms in a inductively coupled plasma by optical emission spectroscopy, by L. Gatilova, S. Bouchoule, S. Guilet, and P. Chabert, Journal of Vacuum Science & Technology A 27, 262 (2009); doi: 10.1116/1.3071950
Recipe name | ? |
Cl2 flow | 6.6 sccm |
H2 flow | 5.4 sccm |
Process time | 6 min |
Platen power | 150 W |
Coil power | 800 W |
Pressure | 0.5 mTorr (strike pressure 10s@10mTorr) |
Platen chiller temperature | 180 oC |
Comment | Sample placed on a Si carrier |
Results | |
Etch rate |
925 nm/min (small piece) |
Sidewall angle |
90o (on this sample) |
Selectivity (InP:SiO2 (PECVD 500nm) | approx.17:1 |
Other tests made |
|
InP etch with Cl2/CH4/Ar 2013
Work done by Matthew Haines in 2013
InP/InGaAsP/InGaAs etch 2011
Unselective etch for large sized features and small aspect ratios by David Larsson, DTU Photonics, 2011
Recipe | InP Etch 1/InP Precond 1 | ? |
Cl2 flow | 20 sccm | 11 sccm |
N2 flow | 40 sccm | 20 sccm |
Ar flow | 10 sccm | 24 sccm |
Platen power | 100 W | 120 W |
Coil power | 500 W | 400 W |
Pressure | 2 mTorr | 2 mTorr |
Platen chiller temperature | 180 oC | 180 oC |
Comment | This is for large structures with samll aspect ratio Use SiO2 carrier (not Si) (Kabi/Bghe June 2018) |
This is for high aspect ratio |
Results (InP Etch 1) | |
Etch rate | 500-600 nm/min |
Sidewall angle | 86-87 o |
Selectivity (InP:SiO2, InP:HSQ) | 50:1 |
InP etching June 2018
Done by Kabi and Bghe @nanolab
Sample pattern before etching
-
Top view of the SiO2 mask before etching
-
Top view of the SiO2 mask before etching
Etching of an InP piece on Si carrier
InP piece patterned with SiO2. The piece was etched on top of a Si wafer without bonding. The recipe "InP etch" was used. The roughness looks high in the bottom of the etched areas, especially in the large open areas.
-
low roughness in narrow trenched
-
low roughness in narrow trenched
-
A little higher roughnedd is larger trences
-
Much larger roughness in open areas
-
Zoom in on the large roughness
-
closed look at the large roughness in the open areas.
Etching of an InP piece on SiO2 carrier
InP piece patterned with SiO2. The piece was etched on top of a Si wafer coated with SiO2 without bonding. The recipe "InP etch" was used. The roughness looks low in the bottom of the etched areas, even in the large open areas.
-
Top view: oxide is gone on the narrow lines, low roughness in the trenches.
-
Top view: low roughness in the trenches.
-
30 dg view: low roughness in the trenches
-
30 dg view: low roughness in the trenches
-
Top view: low roughness in trench and in the large area
Changing the Cl2/N2 ratio
-
Sample S0: Top view of the oxide mask before etching. It is the TRAVKA50 mask, but it is clear that the CD reduction is about the 1-1.5 µm of the lines.
-
Sample S4: Profile view. The recipe InP etch has been used.
The sample has been run on a SiO2 carrier wafer.
There is not much CD change compared to the oxide mask before the etch.
It seems like the SiO2 mask is gone and the sidewall angle from the mask has been transferred into the sample.
The sidewall profile is quit vertical in the lower part.
Etch time 15 min
Etch depth in large open areas: 9.19µm -
Sample S5: Profile view. The recipe InP etch has been used but with modified Cl2 and N2 flows: N2=30 sccm Cl2=30 sccm.
The sample has been run on a SiO2 carrier wafer.
There is not much CD change compared to the oxide mask before the etch.
It seems like the SiO2 mask is gone.
The sidewall profile is overcutting probably due to too little passivation.
Etch time 10 min
Etch depth in large open areas: 11.82µm -
Sample S4: The sidewall roughness on the sample S4 is quite high
-
Sample S5: The sidewall roughness on the sample S5 is quite low.