View source for Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using AOE/PolySi mask

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==High etch rate recipe==
{| border="2" cellspacing="2" cellpadding="3" 
|-style="background:Black; color:White"
!Parameter
|Recipe name: '''SiO2_psi''' ('''SiO2''' etch with '''pSi''' mask)
|-
|Coil Power [W]
|1300
|-
|Platen Power [W]
|500
|-
|Platen temperature [<sup>o</sup>C]
|60
|-
|He flow [sccm]
|300
|-
|C<sub>4</sub>F<sub>8</sub> flow [sccm]
|18
|-
|H<sub>2</sub> flow [sccm]
|0
|-
|Pressure [mTorr]
|4
|-
|}


{| border="2" cellspacing="2" cellpadding="3"
|-style="background:DarkGray; color:White"
!Typical results
!PolySi mask - ''tested by Yunhong Ding @fotonik''
!PolySi mask - ''tested Feb. 2012 by bghe@nanolab''
|-
|Etch rate 
|~0.55 µm/min
|0.50 µm/min
|-
|Selectivity 
|1:~10
|1:17
|-
|SiO2 etch uniformity
|not tested
|&plusmn;4.5% over a 100mm wafer
|-
|Profile [<sup>o</sup>]
|not tested
|see images
|-
|Images
|.
|[[/Images of m_PolySi1 etches|See here]]
|-
|Comments
|.
|Line width reduction is about 2.5µm when etching 12.5µm down. See the images to get more info on this.
|-
|}

<br/>

==Low line width reduction recipe==
It is difficult to get very low line width reduction using P-Si as masking material. This is due to the fact that the etch gas C4F8 that is used to etch SiO2 also etches Si very well. The best result so far is given here:

{| border="2" cellspacing="2" cellpadding="3" 
|-style="background:Black; color:White"
!Parameter
!Poly Si mask
!MLO_psi
|-
|Coil Power [W]
|1100
|1100
|-
|Platen Power [W]
|170
|170
|-
|Platen temperature [<sup>o</sup>C]
|50
|50
|-
|He flow [sccm]
|450
|450
|-
|C<sub>4</sub>F<sub>8</sub> flow [sccm]
|12
|12
|-
|H<sub>2</sub> flow [sccm]
|0
|0
|-
|Pressure [mTorr]
|6
|6
|-
|Spacer settings [mm]
|100
|0
|-
|}


{| border="2" cellspacing="2" cellpadding="3"
|-style="background:DarkGray; color:White"
!Typical results
!PolySi mask - ''tested spring. 2012 by bge@anolab''
!MLP_psi ''tested by Martin Lind Ommen @Nanotech, Fall 2016''
|-
|Etch rate 
|~0.25 µm/min
|244 nm/min
|-
|Selectivity pSi:SiO2
|1:12
|1:5.4
|-
|SiO2 etch uniformity
|&plusmn;1.1% over a 100mm wafer
|
|-
|Profile [<sup>o</sup>]
|see images
|
|-
|Images
|[[/Images of AOEpsiB_8|See here]]
|
|-
|Comments
|Line width reduction is about 1µm when etching 7.5µm down. See the images to get more info on this
|
|-
|}

<br/>

==Good wafer uniformity recipe ==
This recipe has not been optimized to get as uniformity as possible but was just the one with the lowest non-uniformity among the recipes I have tested.

{| border="2" cellspacing="2" cellpadding="3" 
|-style="background:Black; color:White"
!Parameter
!Poly Si mask
|-
|Coil Power [W]
|1300
|-
|Platen Power [W]
|350
|-
|Platen temperature [<sup>o</sup>C]
|60
|-
|He flow [sccm]
|450
|-
|C<sub>4</sub>F<sub>8</sub> flow [sccm]
|18
|-
|H<sub>2</sub> flow [sccm]
|7
|-
|Pressure [mTorr]
|8
|-
|Spacer settings [mm]
|0
|-
|}


{| border="2" cellspacing="2" cellpadding="3"
|-style="background:DarkGray; color:White"
!Typical results
!PolySi mask - ''tested spring. 2012 by bge@anolab''
|-
|Etch rate 
|~0.40 µm/min
|-
|Selectivity 
|1:10
|-
|SiO2 etch uniformity (&plusmn;(max-min/2*avg)
|&plusmn;0.54% over a 100mm wafer
|-
|Profile [<sup>o</sup>]
|see images
|-
|Images
|[[/Images of AOEpsi10|See here]]
|-
|Comments
|Line width reduction is about 3µm when etching 14µm down. See the images to get more info on this
|-
|}

<br/>

==High selectivity to Si-mask recipe==
This recipe has not been optimize to get as good selectivity as possible but was just the one with the highest selectivity among the recipes I have tested.

 
{| border="2" cellspacing="2" cellpadding="3" 
|-style="background:Black; color:White"
!Parameter
!Poly Si mask (M_PSI_4)
|-
|Coil Power [W]
|1300
|-
|Platen Power [W]
|350
|-
|Platen temperature [<sup>o</sup>C]
|20
|-
|He flow [sccm]
|450
|-
|C<math>_4</math>F<math>_8</math> flow [sccm]
|18
|-
|H<math>_2</math> flow [sccm]
|7
|-
|Pressure [mTorr]
|8
|-
|Spacer settings [mm]
|0
|-
|}


{| border="2" cellspacing="2" cellpadding="3"
|-style="background:DarkGray; color:White"
!Typical results
!PolySi mask - ''tested spring. 2012 by bge@nanolab''
|-
|Etch rate 
|~0.43 µm/min
|-
|Selectivity 
|1:24
|-
|SiO2 etch uniformity
|&plusmn;2.2% over a 100mm wafer
|-
|Profile [<sup>o</sup>]
|see images
|-
|Images
|[[/Images of AOEpsiB_2|See here]]
|-
|Comments
|Line width reduction is about 3µm when etching 13µm down. See the images to get more info on this
|-
|}

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