Specific Process Knowledge/Thin film deposition/Furnace LPCVD TEOS: Difference between revisions

Revision as of 14:19, 28 November 2012

LPCVD (Low Pressure Chemical Vapor Deposition) TEOS

Danchip has one LPCVD TEOS furnace (installed in 1995). The furnace is a Tempress horizontal furnace. The process is a batch process, where TEOS can be deposited on up to 15 wafer at a time.

TEOS is a silicon dioxide based on tetraethoxysilane. The reactive gas is TEOS, and the deposition takes place at a temperature of 725 ^oC. It is possible to anneal the TEOS layer to improve the electrical properties as well as chemical resistance.

The LPCVD TEOS has a excellent step coverage and is very good for trench filling. The film thickness is very uniform over the wafer.

The user manual(s), quality control procedure(s) and results, technical information and contact information can be found in LabManager:

Bor Drive-in

Process Knowledge

Please take a look at the process side for deposition of TEOS oxide: Deposition of TEOS using LPCVD

Overview of the performance of the LPCVD TEOS furnace and some process related parameters

Purpose		Deposition of TEOS - Silicon dioxide based on tetraethoxysilane
Performance	Film thickness	0 nm - 2000 nm
	Step coverage	Good
	Film quality	Dense film Few defects
Process parameter range	Process Temperature	725 ^oC
	Process pressure	190 mTorr
	Gas flows	TEOS: 50 sccm OFailed to parse (SVG (MathML can be enabled via browser plugin): Invalid response ("Math extension cannot connect to Restbase.") from server "https://wikimedia.org/api/rest_v1/":): {\displaystyle _2} : 30 sccm
Substrates	Batch size	1-15 4" wafers per run Deposition on both sides of the substrate
Substrates	Substrate material allowed	Silicon wafers (only clean wafers and RCA cleaned) with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned) from furnaces in stack A or B in cleanroom 2 Quartz wafers (RCA cleaned)

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 Deposition of TEOS - Silicon dioxide based on tetraethoxysilane
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 *Few defects
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 *O<math>_2</math>: 30 sccm
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-*Silicon wafers (only clean wafers)
+*Silicon wafers (only clean wafers and RCA cleaned)
 **with layers of silicon oxide or silicon (oxy)nitride (RCA cleaned)
 **from furnaces in stack A or B in cleanroom 2