Specific Process Knowledge/Etch/RIE (Reactive Ion Etch): Difference between revisions

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'''Feedback to this page''': '''[mailto:labadviser@nanolab.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.nanolab.dtu.dk/index.php/Specific_Process_Knowledge/Etch/RIE_(Reactive_Ion_Etch) click here]'''<br>
[[Category: Equipment |Etch RIE]]
[[Category: Etch (Dry) Equipment |RIE]]
{{CC1}}
=<span style="color:#FF0000"> Both RIE's (RIE1 and RIE2) for silicon based etching has been decommissioned </span> =
* <span style="color:#FF0000"> This information is save because it might be valuable as inspiration for other dry etch systems.
== Etching using the dry etch technique RIE (Reactive Ion Etch) ==
== Etching using the dry etch technique RIE (Reactive Ion Etch) ==
[[image:Cluster1a.jpg|200x200px|right|thumb|RIE1 (part of cluster1)]]
<!--
[[image:Cluster2x.jpg|200x200px|right|thumb|RIE2 (part of cluster2)]]
[[image:Cluster1a.jpg|200x200px|right|thumb|RIE1 (part of Cluster1) - positioned in cleanroom2]]
At Danchip we have three RIE's. Two (RIE1 and RIE2) for etching silicon based materials (silicon, silicon oxide, sillicon nitride) and one (III-V RIE) for etching III-V materials (is discussed under III-V processing). The hardware of RIE1 and RIE2 is very similar but you cannot count on that identical recipes on RIE1 and RIE2 perform exactly the same. In addition to that the main difference between RIE1 and RIE2 is the cleanness of the two equipment. In rough terms RIE1 is the clean system and the RIE2 is the dirty system. This means that in RIE2 opposed to RIE1 it is allowed have small amounts of metals exposed to the plasma. Look in the manuals for RIE1 and RIE2 to read the details for this difference (you can find the manuals in LabManager [http://labmanager.danchip.dtu.dk/machine/machine_item.aspx?id=19]).
-->
[[image:Cluster2x.jpg|200x200px|right|thumb|RIE2 (part of Cluster2)- positioned in clean room C-1]]
We had two RIE's. RIE2 for etching silicon based materials, resist and polymers and one (III-V RIE) for etching III-V materials. Here only RIE2 will be described.
 
In RIE2 it is allowed to have small amounts of metals exposed to the plasma.
 
 
'''The user manuals, quality control procedures and results, user APVs, technical information and contact information can be found in LabManager:'''
<!-- remember to remove the type of documents that are not present -->
 
[http://labmanager.dtu.dk/function.php?module=Machine&view=view&mach=19 RIE2 info page in LabManager]
 
== Process information ==
*[[Specific Process Knowledge/Etch/Etching of Silicon/Si etch using RIE1 or RIE2|Etch of silicon using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using RIE1 or RIE2|Etch of silicon oxide using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Nitride/Etch of Silicon Nitride using RIE|Etch of silicon nitride using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Polymer/Etch of Photo Resist using RIE|Etch of photo resist using RIE]]
<br clear="all" />
 
==Equipment performance and process related parameters ==
 
{| border="2" cellspacing="0" cellpadding="2"
 
!colspan="2" border="none" style="background:silver; color:black;" align="center"|Equipment
|style="background:WhiteSmoke; color:black"|<b>RIE1 - '''HAS BEEN DECOMMISSIONED'''</b>
|style="background:WhiteSmoke; color:black"|<b>RIE2 - '''HAS BEEN DECOMMISSIONED'''</b>
|-
!style="background:silver; color:black;" align="center" width="60"|Purpose
|style="background:LightGrey; color:black"|Dry etch of
|style="background:WhiteSmoke; color:silver"|
*Silicon
*Silicon oxide
*Silicon (oxy)nitride
*Resist
|style="background:WhiteSmoke; color:black"|
*Silicon
*Silicon oxide
*Silicon (oxy)nitride
*Resist and other polymers
|-
!style="background:silver; color:black" align="center" valign="center" rowspan="2"|Performance
|style="background:LightGrey; color:black"|Etch rates
|style="background:WhiteSmoke; color:silver"|
*Silicon: ~0.04-0.8 µm/min
*Silicon oxide: ~0.02-0.15 µm/min
*Silicon (oxy)nitride: ~0.02-? µm/min
|style="background:WhiteSmoke; color:black"|
*Silicon: ~0.04-0.8 µm/min
*Silicon oxide: ~0.02-0.15 µm/min
*Silicon (oxy)nitride: ~0.02-? µm/min
|-
|style="background:LightGrey; color:black"|Anisotropy
|style="background:WhiteSmoke; color:silver"|
*Can vary from isotropic to anisotropic with vertical
:sidewalls and on to a physical etch where the sidewalls
:are angled but without etching under the mask.
|style="background:WhiteSmoke; color:black"|
*Can vary from isotropic to anisotropic with vertical
:sidewalls and on to a physical etch where the sidewalls
:are angled but without etching under the mask.
|-
!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Process parameter range
|style="background:LightGrey; color:black"|Max pressure
|style="background:WhiteSmoke; color:silver"|
*800 mTorr
|style="background:WhiteSmoke; color:black"|
*949 mTorr
|-
|style="background:LightGrey; color:black"|Max R.F. power
|style="background:WhiteSmoke; color:silver"|
*600 W
|style="background:WhiteSmoke; color:black"|
*600 W
|-
|style="background:LightGrey; color:black"|Gas flows
|style="background:WhiteSmoke; color:silver"|
*SF<sub>6</sub>: 0-52 sccm
*O<sub>2</sub>: 0-99 sccm
*CHF<sub>3</sub>: 0-100 sccm
*CF<sub>4</sub>: 0-42 sccm
*Ar: 0-146 sccm
*N<sub>2</sub>: 0-100 sccm
*C<sub>2</sub>F<sub>6</sub>: 0-24 sccm
|style="background:WhiteSmoke; color:black"|
*SF<sub>6</sub>: 0-130 sccm
*O<sub>2</sub>: 0-99 sccm
*CHF<sub>3</sub>: 0-99 sccm
*CF<sub>4</sub>: 0-84 sccm
*Ar: 0-145 sccm
*N<sub>2</sub>: 0-99 sccm
|-
!style="background:silver; color:black" align="center" valign="center" rowspan="3"|Substrates
|style="background:LightGrey; color:black"|Batch size
|style="background:WhiteSmoke; color:silver"|
*1 4" wafer
*1 2" wafer (use Al carrier with Si dummy wafer)
*Several smaller samples (use Al carrier with Si dummy wafer)
|style="background:WhiteSmoke; color:black"|
*1 4" wafer (use Al carrier with Si dummy wafer)
*1 2" wafer (use Al carrier with Si dummy wafer)
*1 6" wafer (requires 6" setup)
*Several smaller samples (use Al carrier with Si dummy wafer)
|-
| style="background:LightGrey; color:black"|Allowed materials
|style="background:WhiteSmoke; color:silver"|
*Silicon
*Silicon oxide (with boron, phosphorous and germanium)
*Silicon nitrides (with boron, phosphorous and germanium)
*Pure quartz, fused silica (not Pyrex, Tempax and other glasses)
*Resists: AZ resists, e-beam resists, SU8, DUV resists
*Aluminium as thin film layer on your sample
|style="background:WhiteSmoke; color:black"|
*Silicon
*Silicon oxide (with boron, phosphorous and germanium)
*Silicon nitrides (with boron, phosphorous and germanium)
*Pure quartz, fused silica (not Pyrex, Tempax and other glasses)
*Resists: AZ resists, e-beam resists, SU8, DUV resists
*Other olymers (ask the Plasma group for permission)
*Aluminium as thin film layer on your sample
*Other metals (<5% coverage of the wafer)
|-
|}
 
 
 
 
<!--
== Etching using the dry etch technique RIE (Reactive Ion Etch) ==
[[image:Cluster1a.jpg|200x200px|right|thumb|RIE1 (part of cluster1) - positioned in cleanroom2]]
[[image:Cluster2x.jpg|200x200px|right|thumb|RIE2 (part of cluster2)- positioned in cleanroom3]]
We have three RIE's. Two (RIE1 and RIE2) for etching silicon based materials (silicon, silicon oxide, silicon nitride) and one (III-V RIE) for etching III-V materials. The hardware of RIE1 and RIE2 is very similar but you cannot count on that identical recipes on RIE1 and RIE2 perform exactly the same. In addition to that the main difference between RIE1 and RIE2 is the cleanness of the two equipment. In rough terms RIE1 is the clean system and the RIE2 is the dirty system. This means that in RIE2 opposed to RIE1 it is allowed to have small amounts of metals exposed to the plasma. Look in the manuals for RIE1 and RIE2 to read the details for this difference (you can find the manuals in LabManager [http://labmanager.dtu.dk/function.php?module=Machine&view=view&mach=18 RIE1], [http://labmanager.dtu.dk/function.php?module=Machine&view=view&mach=19 RIE2]).


== Process information ==
== Process information ==
Line 8: Line 144:
*[[Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using RIE1 or RIE2|Etch of Silicon Oxide using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using RIE1 or RIE2|Etch of Silicon Oxide using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Nitride/Etch of Silicon Nitride using RIE|Etch of Silicon Nitride using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Silicon Nitride/Etch of Silicon Nitride using RIE|Etch of Silicon Nitride using RIE]]
*[[Specific Process Knowledge/Etch/Etching of Polymer/Etch of Photo Resist using RIE|Etch of Photo Resist using RIE]]
<br clear="all" />
<br clear="all" />


==A rough overview of the performance of PECVD thin films and some process related parameters==
==Overview of the performance of the RIE´s and some process related parameters==


{| border="2" cellspacing="0" cellpadding="10"  
{| border="2" cellspacing="0" cellpadding="2"  
|-
|-
!style="background:silver; color:black;" align="left"|Purpose  
!style="background:silver; color:black;" align="left"|Purpose  
|style="background:LightGrey; color:black"|Dry etch of ||style="background:WhiteSmoke; color:black"|
|style="background:LightGrey; color:black"|Dry etch of  
|style="background:WhiteSmoke; color:black"|
*Silicon
*Silicon
*Silicon oxide
*Silicon oxide
*Silicon (oxy)nitride
*Silicon (oxy)nitride
|-
|-
!style="background:silver; color:black" align="left"|Performance
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Performance
|style="background:LightGrey; color:black"|Etch rates||style="background:WhiteSmoke; color:black"|
|style="background:LightGrey; color:black"|Etch rates
|style="background:WhiteSmoke; color:black"|
*Silicon: ~0.04-0.8 µm/min
*Silicon: ~0.04-0.8 µm/min
*Silicon oxide:~0.02-0.15 µm/min
*Silicon oxide:~0.02-0.15 µm/min
*Silicon (oxy)nitride:~0.02-? µm/min
*Silicon (oxy)nitride:~0.02-? µm/min
|-
|-
|style="background:silver; color:black" |.||style="background:LightGrey; color:black"|Anisotropy||style="background:WhiteSmoke; color:black"|
|style="background:LightGrey; color:black"|Anisotropy
*~Can vary from isotropic to anisotropic with vertical sidewalls and on to a physical etch were the sidewalls are angled but without etching under the mask.  
|style="background:WhiteSmoke; color:black"|
*Can vary from isotropic to anisotropic with vertical sidewalls and on to a physical etch were the sidewalls are angled but without etching under the mask.  
|-
|-
|style="background:silver; color:black"|.||style="background:LightGrey; color:black"|Process pressure
!style="background:silver; color:black" align="left" valign="top" rowspan="2"|Process parameter range
|style="background:LightGrey; color:black"|Process pressure
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*~20-200 mTorr
*~20-200 mTorr
|-
|-
|style="background:silver; color:black"|.||style="background:LightGrey; color:black"|Gas flows
|style="background:LightGrey; color:black"|Gas flows
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*SF<math>_6</math>: sccm
*SF<sub>6</sub>: 0-130 sccm
*O<math>_2</math>O: sccm
*O<sub>2</sub>: 0-100 sccm
*CHF<math>_3</math>: sccm
*CHF<sub>3</sub>: 0-100 sccm
*CF<math>_4</math>: sccm
*CF<sub>4</sub>: 0-84 sccm
*H<math>_2</math>: sccm
*H<sub>2</sub>: ?sccm
*C<math>_2</math>F<math>_6</math>: sccm
*Ar: 0-145 sccm
*N<sub>2</sub>: 0-100 sccm
*C<sub>2</sub>F<sub>6</sub>: 0-24 sccm
|-
|-
!style="background:silver; color:black" align="left"|Substrates
!style="background:silver; color:black" align="left" valign="top" rowspan="3"|Substrates
|style="background:LightGrey; color:black"|Batch size
|style="background:LightGrey; color:black"|Batch size
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
Line 49: Line 192:
*Or several smaller pieces
*Or several smaller pieces
|-
|-
|style="background:silver; color:black"|.|| style="background:LightGrey; color:black"|Substrate material allowed
| style="background:LightGrey; color:black"|Substrate material allowed
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Silicon wafers
*Silicon wafers
Line 55: Line 198:
*Quartz wafers  
*Quartz wafers  
|-  
|-  
|style="background:silver; color:black"|.|| style="background:LightGrey; color:black"|Possible masking material
| style="background:LightGrey; color:black"|Possible masking material
|style="background:WhiteSmoke; color:black"|
|style="background:WhiteSmoke; color:black"|
*Photoresist/e-beam resist
*Silicon/PolySi
*Silicon/PolySi
*Silicon oxide or silicon (oxy)nitride
*Silicon oxide or silicon (oxy)nitride
*Aluminium
*Aluminium
*Other metals if the coverage is <5% of the wafer area  
*Other metals if the coverage is <5% of the wafer area (ONLY RIE2!)  
|-
|style="background:silver; color:black"|.|| style="background:LightGrey; color:black"|Material allowed on the substrate
|style="background:WhiteSmoke; color:black"|
*Aluminium
*All metals < 5% of the substrate coverage (ONLY PECVD3!)
|-  
|-  
|}
|}
-->

Latest revision as of 11:43, 24 March 2023

Feedback to this page: click here
Unless otherwise stated, this page is written by DTU Nanolab internal

Both RIE's (RIE1 and RIE2) for silicon based etching has been decommissioned

  • This information is save because it might be valuable as inspiration for other dry etch systems.

Etching using the dry etch technique RIE (Reactive Ion Etch)

RIE2 (part of Cluster2)- positioned in clean room C-1

We had two RIE's. RIE2 for etching silicon based materials, resist and polymers and one (III-V RIE) for etching III-V materials. Here only RIE2 will be described.

In RIE2 it is allowed to have small amounts of metals exposed to the plasma.


The user manuals, quality control procedures and results, user APVs, technical information and contact information can be found in LabManager:

RIE2 info page in LabManager

Process information


Equipment performance and process related parameters

Equipment RIE1 - HAS BEEN DECOMMISSIONED RIE2 - HAS BEEN DECOMMISSIONED
Purpose Dry etch of
  • Silicon
  • Silicon oxide
  • Silicon (oxy)nitride
  • Resist
  • Silicon
  • Silicon oxide
  • Silicon (oxy)nitride
  • Resist and other polymers
Performance Etch rates
  • Silicon: ~0.04-0.8 µm/min
  • Silicon oxide: ~0.02-0.15 µm/min
  • Silicon (oxy)nitride: ~0.02-? µm/min
  • Silicon: ~0.04-0.8 µm/min
  • Silicon oxide: ~0.02-0.15 µm/min
  • Silicon (oxy)nitride: ~0.02-? µm/min
Anisotropy
  • Can vary from isotropic to anisotropic with vertical
sidewalls and on to a physical etch where the sidewalls
are angled but without etching under the mask.
  • Can vary from isotropic to anisotropic with vertical
sidewalls and on to a physical etch where the sidewalls
are angled but without etching under the mask.
Process parameter range Max pressure
  • 800 mTorr
  • 949 mTorr
Max R.F. power
  • 600 W
  • 600 W
Gas flows
  • SF6: 0-52 sccm
  • O2: 0-99 sccm
  • CHF3: 0-100 sccm
  • CF4: 0-42 sccm
  • Ar: 0-146 sccm
  • N2: 0-100 sccm
  • C2F6: 0-24 sccm
  • SF6: 0-130 sccm
  • O2: 0-99 sccm
  • CHF3: 0-99 sccm
  • CF4: 0-84 sccm
  • Ar: 0-145 sccm
  • N2: 0-99 sccm
Substrates Batch size
  • 1 4" wafer
  • 1 2" wafer (use Al carrier with Si dummy wafer)
  • Several smaller samples (use Al carrier with Si dummy wafer)
  • 1 4" wafer (use Al carrier with Si dummy wafer)
  • 1 2" wafer (use Al carrier with Si dummy wafer)
  • 1 6" wafer (requires 6" setup)
  • Several smaller samples (use Al carrier with Si dummy wafer)
Allowed materials
  • Silicon
  • Silicon oxide (with boron, phosphorous and germanium)
  • Silicon nitrides (with boron, phosphorous and germanium)
  • Pure quartz, fused silica (not Pyrex, Tempax and other glasses)
  • Resists: AZ resists, e-beam resists, SU8, DUV resists
  • Aluminium as thin film layer on your sample
  • Silicon
  • Silicon oxide (with boron, phosphorous and germanium)
  • Silicon nitrides (with boron, phosphorous and germanium)
  • Pure quartz, fused silica (not Pyrex, Tempax and other glasses)
  • Resists: AZ resists, e-beam resists, SU8, DUV resists
  • Other olymers (ask the Plasma group for permission)
  • Aluminium as thin film layer on your sample
  • Other metals (<5% coverage of the wafer)