Specific Process Knowledge/Thin film deposition/Deposition of Gold: Difference between revisions
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== Adhesion of Au on Si == | == Adhesion of Au on Si == | ||
The adhesion of gold on Silicon or Silicon with native oxide is not very good. The Si substrate is often deposited an adhesion layer before the gold deposition. A few nm of Chromium or Titanium works well and they react with the Oxygen of Silicon oxide and present a metallic bond with gold. 5 nm to 10 nm thick of Cr or Ti is commonly used and it is important to deposit Cr or Ti and then immediately Au. If the vacuum chamber is opened in between, the surface of Cr or Ti will get oxidized and that will give a poor adhesion. If a gold layer needs to be deposited directly on Silicon, then native oxide has to be removed by deep in diluted HF and immediately load the evaporation chamber. And after the deposition, the wafer has to be heated op to get some Au-Si diffusion which improves the adhesion. | The adhesion of gold on Silicon or Silicon with native oxide is not very good. The Si substrate is often deposited an adhesion layer before the gold deposition. A few nm of Chromium or Titanium works well and they react with the Oxygen of Silicon oxide and present a metallic bond with gold. You can also use polymer or organosilane adhesion layers; an example of this is described below. | ||
For Cr and Ti adhesion layers, a 5 nm to 10 nm thick layer of Cr or Ti is commonly used and it is important to deposit Cr or Ti and then immediately Au. If the vacuum chamber is opened in between, the surface of Cr or Ti will get oxidized and that will give a poor adhesion. If a gold layer needs to be deposited directly on Silicon, then native oxide has to be removed by deep in diluted HF and immediately load the evaporation chamber. And after the deposition, the wafer has to be heated op to get some Au-Si diffusion which improves the adhesion. | |||
*[[/Adhesion layers|Read more about Ti and Cr adhesion layers]]. | *[[/Adhesion layers|Read more about Ti and Cr adhesion layers]]. |
Revision as of 07:51, 13 December 2018
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Gold can be deposited by e-beam evaporation or sputtering. In the chart below you can compare the different deposition equipment. We also describe adhesion layers for gold deposition and the roughness of gold deposited in the Wordentec.
Au deposition
Below you can compare the different equipment that allows Au deposition.
E-beam evaporation (E-beam evaporator Temescal) | E-beam evaporation (Wordentec) | Sputter (Lesker) | E-beam evaporation (Physimeca) | Sputter coater (Sputter coater 03) | Sputter coater (Sputter coater 04) | |
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General description | E-beam deposition of Au | E-beam deposition of Au | Sputter deposition of Au | E-beam deposition of Au | Sputter deposition of Au | Sputter deposition of Au |
Pre-clean | Ar ion source | RF Ar clean | RF Ar clean | |||
Layer thickness | 10 Å to 1 µm* | 10 Å to 5000 Å* | 10 Å to | 10 Å to about 3000 Å** | ||
Deposition rate | 0.5 Å/s to 10 Å/s | 1 Å/s to 10 Å/s | From 5 Å/s up to 10Å/s | Not measured | Not measured | |
Batch size |
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Allowed materials |
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Comment |
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* For thicknesses above 600 nm write to metal@danchip.dtu.dk to ensure that there will be enough material in the machine.
** For thicknesses above 200 nm write to metal@danchip.dtu.dk to ensure that there will be enough material in the machine.
Studies of Au deposition processes in the Wordentec
Roughness of Au layers - Roughness of Au layers deposited with different equipment and settings
Wafer temperature
The wafer temperature during e-beam deposition of 200 nm Au on six wafers has been measured using thermal labels on the backside of the wafers. The following results were obtained:
Wafer | Temperature [C] |
---|---|
1 | 48 |
2 | 60 |
3 | 65 |
4 | 71 |
5 | 71 |
6 | 77 |
The temperatures are accurate within approximately +/- 3C and probably underestimating the actual wafer temperature slightly. It is observed that the wafer temperature increases with each wafer, thus if wafer temperature is of concern it is advised to reduce the number of wafers per run.
Adhesion of Au on Si
The adhesion of gold on Silicon or Silicon with native oxide is not very good. The Si substrate is often deposited an adhesion layer before the gold deposition. A few nm of Chromium or Titanium works well and they react with the Oxygen of Silicon oxide and present a metallic bond with gold. You can also use polymer or organosilane adhesion layers; an example of this is described below.
For Cr and Ti adhesion layers, a 5 nm to 10 nm thick layer of Cr or Ti is commonly used and it is important to deposit Cr or Ti and then immediately Au. If the vacuum chamber is opened in between, the surface of Cr or Ti will get oxidized and that will give a poor adhesion. If a gold layer needs to be deposited directly on Silicon, then native oxide has to be removed by deep in diluted HF and immediately load the evaporation chamber. And after the deposition, the wafer has to be heated op to get some Au-Si diffusion which improves the adhesion.
Below you can read about using an organosilane adhesion layer.
Thin Au layer using APTMS adhesion layer and sputter system Lesker
For depositing very thin, down to 6nm continuous Au layers on Si/SiO2 substrates. Works also with ALD deposited Al2O3 and TiO2 as substrate.
Adhesion promoter: aminopropyltrimethoxysilane (APTMS). MSDS here.
Adhesion promoter deposition: 3h immersion in 95%IPA, 2.5% H2O, 2.5% APTMS.
NOTE: the APTMS layer is degrading quickly in atmosphere, so deposit it as close to the Au deposition as possible.
Lesker deposition parameters:
Gun # | Power [W] | Ramp rate [W/s] | Pressure [mtorr] | Atmosphere | Deposition rate [nm/s] |
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2 | 300 | 5 | 3 | Ar | 1 |
NOTE: As a general rule, the lower the pressure and higher the power (i.e. higher the deposition rate), the better.
Film characteristics (5-10 wafers for each thickness):
Thickness [nm] | Roughness min [nm] | Roughness max [nm] |
---|---|---|
6 | 0.25 | 0.4 |
10 | 0.3 | 0.5 |
24 | 0.3 | 0.5 |
NOTE: After depositing 10 layers of 10nm each, one on top of each other, the roughness increased to 0.8nm RMS
Work done by Johneph Sukham (@ DTU Fotonik) and Radu Malureanu (@ DTU Fotonik and DTU Danchip) in 2016-2017.