Specific Process Knowledge/Etch/DRIE-Pegasus/SOIetch: Difference between revisions

From LabAdviser
Jml (talk | contribs)
No edit summary
Jmli (talk | contribs)
No edit summary
Line 1: Line 1:
'''Feedback to this page''': '''[mailto:labadviser@danchip.dtu.dk?Subject=Feed%20back%20from%20page%20http://labadviser.danchip.dtu.dk/index.php/Specific_Process_Knowledge/Etch/DRIE-Pegasus/SOIetch click here]'''
== SOI etch ==
== SOI etch ==



Revision as of 16:30, 3 October 2013

Feedback to this page: click here

SOI etch

The SOI etch uses the Low frequency (LF) platen generator to minimize the notching at buried stop layers such as the BOX layer in a SOI wafer.

SOI etch specifications
Parameter Specification Average result
Etch rate (µm/min) > 10 10.7
Etched depth (µm) 100 107
Scallop size (nm) < 800 685
Profile (degs) 91 +/- 1 90.7
Selectivity to AZ photoresist > 100 183
Undercut (µm) <1.5 0.89
Uniformity (%) < 3.5 2.7
Repeatability (%) <4 0.47



SOI etch recipe
Main etch (D->E) Etch Dep
Gas flow (sccm) SF6 400 O2 40 C4F8 250
Cycle time (secs) 3.0 2.0
Pressure (mtorr) 30 25
Coil power (W) 2800 2000
LF Platen power (W) 75 0
LF Platen Pulsing software set-up 0.025s, 75% -
Cycles 96 (process time 08:00)
Common Temperature 20 degs, HBC 10 torr, Long funnel, with baffle & 100 mm spacers