Specific Process Knowledge/Etch/Etching of Silicon Oxide/SiO2 etch using ASE: Difference between revisions
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==Development work: SiO2 etch with resist mask, sample on carrier (Si carrier)== | ==Development work: SiO2 etch with resist mask, sample on carrier (Si carrier)== | ||
see here [[Media:ASE SiO2 etch on carrier ICP C4F8 H2 no He rev02.pdf]]. Zoom in | see here [[Media:ASE SiO2 etch on carrier ICP C4F8 H2 no He rev02.pdf]]. Zoom in to read and see the images: (Ctrl + "+") | ||
*Please ask Berit Herstrøm for help with SiO2 etching. | *Please ask Berit Herstrøm for help with SiO2 etching. | ||
Revision as of 11:56, 5 April 2018
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THIS PAGE IS UNDER CONSTRUCTION
Development work: SiO2 etch with resist mask, sample on carrier (Si carrier)
see here Media:ASE SiO2 etch on carrier ICP C4F8 H2 no He rev02.pdf. Zoom in to read and see the images: (Ctrl + "+")
- Please ask Berit Herstrøm for help with SiO2 etching.